© 2000 Fairchild Semiconductor Corporation

DS006409

www.fairchildsemi.com

August 1986

Revised April 2000

DM74LS221 Dual Non-Retriggerable One-Shot

with Clear and Complementary Outputs

General Description

The DM74LS221 is a dual monostable multivibrator with

Schmitt-trigger input. Each device has three inputs permit-

ting the choice of either leading-edge or trailing-edge trig-

gering. Pin (A) is an active-LOW trigger transition input and

pin (B) is an active-HIGH transition Schmitt-trigger input

that allows jitter free triggering for inputs with transition

rates as slow as 1 volt/second. This provides the input with

excellent noise immunity. Additionally an internal latching

circuit at the input stage also provides a high immunity to

pulse at a predetermined time independent of the timing

components. This (CLR) input also serves as a trigger

input when it is pulsed with a low level pulse transition

(

). To obtain the best and trouble free operation from

this device please read operating rules as well as the Fair-

child Semiconductor one-shot application notes carefully

and observe recommendations.

Features

s A dual, highly stable one-shot

s Pin-out identical to DM74LS123 (Note 1)

s Output pulse width range from 30 ns to 70 seconds

s Hysteresis provided at (B) input for added noise

immunity

s Direct reset terminates output pulse

s Triggerable from CLEAR input

s DTL, TTL compatible

s Input clamp diodes

Note 1: The pin-out is identical to DM74LS123 but, functionally it is not;

refer to Operating Rules #10 in this datasheet.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

H

= HIGH Logic Level

L

= LOW Logic Level

X

= Can Be Either LOW or HIGH

↑ = Positive Going Transition

↓ = Negative Going Transition

 = A Positive Pulse

= A Negative Pulse

Note 2: This mode of triggering requires first the B input be set from a

LOW-to-HIGH level while the CLEAR input is maintained at logic LOW

level. Then with the B input at logic HIGH level, the CLEAR input whose

positive transition from LOW-to-HIGH will trigger an output pulse.

Order Number

Package Number

Package Description

DM74LS221M

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

DM74LS221SJ

M16D

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

DM74LS221N

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Inputs

Outputs

CLEAR

A

B

Q

Q

LX

X

L

H

XH

X

L

H

XX

L

L

H

HL

↑



H

↓

H



↑ (Note 2)

L

H