FAN5250

REV. 1.1.6 3/12/03

3

Pin Description

Pin

Number Pin Name

Pin Function Description

1

AGND

Analog Ground. This is the signal ground reference for the IC. All voltage levels are

measured with respect to this pin.

2

VCC

VCC. This pin powers the chip. The IC starts to operate when voltage on this pin exceeds

4.6V (UVLO rising) and shuts down when it drops below 4.3V (UVLO falling).

3

PGOOD

Power Good Flag. An open-drain output that will pull LOW when the core output is

outside of a +25% –10% range of the VID reference voltage The PGOOD pin is kept high

during transitions between VID settings, Deep Sleep, and Reserved Mode transitions.

4EN

ENABLE. This pin enables IC operation when either left open, or pulled up to VCC.

Toggling EN will also reset the chip after a latched fault condition.

5

FPWM

Forced PWM mode. When logic low, inhibits the chip from entering hysteretic operating

mode.

6ALTV

Alternative to VID. The IC will regulate to the voltage on this pin if it is below the highest

VID voltage (1.75V). Such a requirement may occur during CPU initialization or during

some power saving modes. This pin has a 10

µA current source, so that its voltage can be

programmed with a resistor to GND. See Alternative Voltage Programming on page 8 for

details.

7

FREQ

Frequency Set. Logic Low sets the operating frequency to 300Khz. High sets the

frequency to 600Khz.

8–12

VID0–4

Voltage Identification Code. Input to VID DAC. Sets the output voltage according to the

codes set as defined in Table 1.

13

VIN

Input Voltage from battery. This voltage is used by the oscillator for feed-forward

compensation of input voltage variation.

14

SS

Soft Start. A capacitor from this pin to GND programs the slew rate of the converter

during initialization as well as in operation. This pin is used as the reference against which

the output is compared. During initialization, this pin is charged with a 25

µA current

source. Once this pin reaches 0.5V, its function changes, and it assumes the value of the

voltage as set by the VID programming. The current driving this pin is then limited to

+500

15

ILIM

Current Limit. A resistor from this pin to GND sets the current limit.

16

VCORE Output Sense. This pin is the feedback from the VCORE output. Used for

regulation as well as PGOOD, under-voltage and over-voltage protection and monitoring.

17

NC

No internal connection. While no connection is necessary, tying this pin to GND is

recommended to reduce coupled noise into pin 16 from pin 18.

18

BOOT

BOOT. The positive supply for the upper MOSFET driver. Connect as shown in Figure 1.

19

HDRV

High-Side Drive. The high-side (upper) MOSFET driver output.

20

SW

Switching node. The return for the high-side MOSFET driver.

21

ISNS

Current Sense Input. Monitors the voltage drop across the lower MOSFET or external

sense resistor for current feedback.

22

PGND

Power Ground. The return for the low-side MOSFET driver.

23

LDRV

Low-Side Drive. The low-side (lower) MOSFET driver output.

24

PVCC

Power VCC. The positive supply for the lower MOSFET driver.