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FDC6320 Arkusz danych(PDF) 7 Page - Fairchild Semiconductor |
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FDC6320 Arkusz danych(HTML) 7 Page - Fairchild Semiconductor |
7 / 7 page FDC6320C.Rev C Typical Electrical Characteristics: P-Channel (continued) Figure 18. Maximum Safe Operating Area. Figure 17. Gate Charge Characteristics . Figure 20. Single Pulse Maximum Power Dissipation. Figure 19. Capacitance Characteristics. 0.0001 0.001 0.01 0.1 1 10 100 300 0.01 0.02 0.05 0.1 0.2 0.5 1 t , TIME (sec) 1 Single Pulse D = 0.5 0.1 0.05 0.02 0.01 0.2 Duty Cycle, D = t / t 1 2 R (t) = r(t) * R R = See Note 1b θJA θJA θJA T - T = P * R (t) θJA A J P(pk) t1 t 2 Figure 21. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal response will change depending on the circuit board design. 0.01 0.1 1 10 100 300 0 1 2 3 4 5 SINGLE PULSE TIME (SEC) SINGLE PULSE R =See note 1b T = 25°C θJA A 0 0.1 0.2 0.3 0.4 0.5 0 2 4 6 8 Q , GATE CHARGE (nC) g V = -5V DS -10 -15 I = -0.2A D 0.1 0.3 1 2 5 10 15 25 1 2 3 5 10 15 25 -V , DRAIN TO SOURCE VOLTAGE (V) DS C iss f = 1 MHz V = 0 V GS Coss Crss 1 2 5 10 20 40 0.01 0.02 0.05 0.1 0.2 0.5 0.8 - V , DRAIN-SOURCE VOLTAGE (V) RDS(ON) LIMIT DC DS 1s 100ms 10ms V = -2.7V SINGLE PULSE R =See Note 1b T = 25°C GS A θJA 1ms |
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