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ADF7021-NDF Arkusz danych(PDF) 1 Page - Analog Devices

Numer części ADF7021-NDF
Szczegółowy opis  High Performance Narrow-Band Transceiver IC
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Strona internetowa  http://www.analog.com
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ADF7021-NDF Arkusz danych(HTML) 1 Page - Analog Devices

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High Performance
Narrow-Band Transceiver IC
ADF7021-N
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
FEATURES
Low power, narrow-band transceiver
Frequency bands using dual VCO
80 MHz to 650 MHz
842 MHz to 916 MHz
Programmable IF filter bandwidths of
9 kHz, 13.5 kHz, and 18.5 kHz
Modulation schemes: 2FSK, 3FSK, 4FSK, MSK
Spectral shaping: Gaussian and raised cosine filtering
Data rates supported: 0.05 kbps to 24 kbps
2.3 V to 3.6 V power supply
Programmable output power
−16 dBm to +13 dBm in 63 steps
Automatic power amplifier (PA) ramp control
Receiver sensitivity
−130 dBm at 100 bps, 2FSK
−122 dBm at 1 kbps, 2FSK
Patent pending, on-chip image rejection calibration
On-chip VCO and fractional-N PLL
On-chip, 7-bit ADC and temperature sensor
Fully automatic frequency control loop (AFC)
Digital received signal strength indication (RSSI)
Integrated Tx/Rx switch
0.1 μA leakage current in power-down mode
APPLICATIONS
Narrow-band, short range device (SRD) standards
ARIB STD-T67, ETSI EN 300 220, Korean SRD standard,
FCC Part 15, FCC Part 90, FCC Part 95
Low cost, wireless data transfer
Remote control/security systems
Wireless metering
Wireless medical telemetry service (WMTS)
Home automation
Process and building control
Pagers
FUNCTIONAL BLOCK DIAGRAM
Tx/Rx
CONTROL
AFC
CONTROL
2FSK
3FSK
4FSK
DEMODULATOR
CLOCK
AND DATA
RECOVERY
RSSI/
7-BIT ADC
GAIN
DIV R
RFOUT
LNA
PFD
CP
OSC1
OSC2
N/N + 1
DIV P
TEMP
SENSOR
OSC
CLK
DIV
CLKOUT
TEST MUX
VCOIN
CPOUT
LDO(1:4)
MUXOUT
RSET
CREG(1:4)
RLNA
RFIN
RFINB
CE
TxRxCLK
SWD
TxRxDATA
SERIAL
PORT
SLE
SDATA
SREAD
SCLK
IF FILTER
Σ-Δ
MODULATOR
PA RAMP
L1
L2
LOG AMP
MUX
2FSK
3FSK
4FSK
MOD CONTROL
GAUSSIAN/
RAISED COSINE
FILTER
3FSK
ENCODING
AGC
CONTROL
MUX
÷1/÷2
VCO1
VCO2
÷2
Figure 1.


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