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AD5271BRMZ-20-RL7 Arkusz danych(PDF) 2 Page - Analog Devices

Numer części AD5271BRMZ-20-RL7
Szczegółowy opis  1024-/256-Position, 1% Resistor Tolerance Error, SPI Interface and 50-TP Memory Digital Rheostat
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD5271BRMZ-20-RL7 Arkusz danych(HTML) 2 Page - Analog Devices

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AD5270/AD5271
Data Sheet
Rev. F | Page 2 of 24
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics—AD5270 .......................................... 3
Electrical Characteristics—AD5271 .......................................... 5
Interface Timing Specifications.................................................. 7
Absolute Maximum Ratings............................................................ 9
Thermal Resistance ...................................................................... 9
ESD Caution.................................................................................. 9
Pin Configuration and Function Descriptions........................... 10
Typical Performance Characteristics ........................................... 11
Test Circuits..................................................................................... 17
Theory of Operation ...................................................................... 18
Serial Data Interface................................................................... 18
Shift Register............................................................................... 18
RDAC Register............................................................................ 18
50-TP Memory Block ................................................................ 18
Write Protection ......................................................................... 18
RDAC and 50-TP Read Operation .......................................... 19
Shut-Down Mode....................................................................... 20
Resistor Performance Mode...................................................... 20
Reset............................................................................................. 20
SDO Pin and Daisy-Chain Operation..................................... 21
RDAC Architecture.................................................................... 21
Programming the Variable Resistor......................................... 22
EXT_CAP Capacitor.................................................................. 22
Terminal Voltage Operating Range ......................................... 22
Power-Up Sequence ................................................................... 22
Outline Dimensions....................................................................... 23
Ordering Guide .......................................................................... 24
REVISION HISTORY
3/13—Rev. E to Rev. F
Changed Resistor Noise Density, RAW = 20 kΩ from 50 nV/√Hz
to 13 nV/√Hz; Table 1...................................................................... 4
Changed Resistor Noise Density, RAW = 20 kΩ from 50 nV/√Hz
to 13 nV/√Hz; Table 4...................................................................... 6
Updated Outline Dimensions....................................................... 23
12/10—Rev. D to Rev. E
Changes to SDO Pin Description................................................. 10
Changes to SDO Pin and Daisy-Chain Operation Section....... 21
11/10—Rev. C to Rev. D
Changes to Figure 25...................................................................... 14
9/10—Rev. B to Rev. C
Changes to Figure 3 Caption........................................................... 7
Changes to Figure 4 Caption........................................................... 8
Deleted Daisy-Chain Operation Section, Added SDO Pin and
Daisy-Chain Operation Section ................................................... 21
5/10—Rev. A to Rev. B
Added LFCSP Throughout ..............................................................1
Changed OTP to 50-TP Throughout..............................................1
Changes to Product Title, Features, and General Description....1
Changes to Table 1.............................................................................3
Added Table 3; Renumbered Sequentially .....................................4
Changes to Table 4.............................................................................5
Added Table 6 ....................................................................................6
Changes to Table 8 and Table 9........................................................9
Added Figure 6 and changes to Table 10..................................... 10
Replaced Typical Performance Characteristics Section ............ 11
Changes to Figure 44...................................................................... 21
Updated Outline Dimensions....................................................... 23
Changes to Ordering Guide.......................................................... 24
3/10—Rev. 0 to Rev. A
Changes to Product Title and General Description.....................1
Changes to Theory of Operation Section...................................14
10/09—Revision 0: Initial Version


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