AD9826KRSZRL datasheet(6/20 Pages) AD

Numer części	AD9826KRSZRL

Szczegółowy opis	Complete 16-Bit Imaging Signal Processor

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Producent	AD [Analog Devices]

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AD9826

–6–

DEFINITIONS OF SPECIFICATIONS

INTEGRAL NONLINEARITY (INL)

Integral nonlinearity error refers to the deviation of each individual

code from a line drawn from “zero scale” through “positive full

scale.” The point used as “zero scale” occurs 1/2 LSB before the

first code transition. “Positive full scale” is defined as a level

1 1/2 LSB beyond the last code transition. The deviation is

measured from the middle of each particular code to the true

straight line.

DIFFERENTIAL NONLINEARITY (DNL)

An ideal ADC exhibits code transitions that are exactly 1 LSB

apart. DNL is the deviation from this ideal value. Thus every

code must have a finite width. No missing codes guaranteed

to 16-bit resolution indicates that all 65536 codes, respec-

tively, must be present over all operating ranges.

OFFSET ERROR

The first ADC code transition should occur at a level 1/2 LSB

above the nominal zero scale voltage. The offset error is the

deviation of the actual first code transition level from the

ideal level.

GAIN ERROR

The last code transition should occur for an analog value

1 1/2 LSB below the nominal full scale voltage. Gain error is

the deviation of the actual difference between first and last

code transitions and the ideal difference between the first and

last code transitions.

INPUT REFERRED NOISE

The rms output noise is measured using histogram techniques.

The ADC output codes’ standard deviation is calculated in

LSB, and can be converted to an equivalent voltage, using the

relationship 1 LSB = 4 V/65536 = 61

μV. The noise may then

be referred to the input of the AD9826 by dividing by the

PGA gain.

CHANNEL-TO-CHANNEL CROSSTALK

In an ideal 3-channel system, the signal in one channel will not

influence the signal level of another channel. The channel-to-

channel crosstalk specification is a measure of the change that

occurs in one channel as the other two channels are varied. In

the AD9826, one channel is grounded and the other two chan-

nels are exercised with full scale input signals. The change in the

output codes from the first channel is measured and compared

with the result when all three channels are grounded. The differ-

ence is the channel-to-channel crosstalk, stated in LSB.

APERTURE DELAY

The aperture delay is the time delay that occurs from when a

sampling edge is applied to the AD9826 until the actual sample

of the input signal is held. Both CDSCLK1 and CDSCLK2

sample the input signal during the transition from high to low,

so the aperture delay is measured from each clock’s falling edge

to the instant the actual internal sample is taken.

POWER SUPPLY REJECTION

Power supply rejection specifies the maximum full-scale change

that occurs from the initial value when the supplies are varied

over the specified limits.

REV. B

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Analog Devices	AD9826KRS	159Kb / 20P	Complete 16-Bit Imaging Signal Processor REV. A

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