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ST1S40IPUR Arkusz danych(PDF) 10 Page - STMicroelectronics |
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ST1S40IPUR Arkusz danych(HTML) 10 Page - STMicroelectronics |
10 / 30 page Functional description ST1S40 10/30 Doc ID 17928 Rev 4 Equation 6 and Equation 7 The resistor to adjust the output voltage gives the term from output voltage to the FB pin. GDIV(s) is: The transfer function from FB to Vcc (output of E/A) introduces the singularities (poles and zeroes) to stabilize the loop. Figure 5 shows the small signal model of the error amplifier with the internal compensation network. Figure 5. Small signal model for the error amplifier RC and CC introduce a pole and a zero in the open loop gain. CP does not significantly affect system stability and can be neglected. So GEA(s) results: Equation 8 where GEA= Gm · Ro The poles of this transfer function are (if Cc >> C0+CP): Q P 1 π m C 1D – () 0,5 – ⋅ [] ⋅ ---------------------------------------------------------- = ω n π f SW ⋅ = G DIV s () R 2 R 1 R 2 + -------------------- = G EA s () G EA0 1s + R c C c ⋅⋅ () ⋅ s 2 R 0 C 0 C p + () R c C c sR 0 C c ⋅ R 0 C 0 C p + () R c C c ⋅ + ⋅ + () 1 + ⋅ + ⋅⋅ ⋅ ⋅ ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- = |
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