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ADS41B49IRGZ25 Arkusz danych(PDF) 5 Page - Texas Instruments

Numer części ADS41B49IRGZ25
Szczegółowy opis  14-/12-Bit, 250MSPS, Ultralow-Power ADC with Analog Buffers
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Producent  TI [Texas Instruments]
Strona internetowa  http://www.ti.com
Logo TI - Texas Instruments

ADS41B49IRGZ25 Arkusz danych(HTML) 5 Page - Texas Instruments

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ADS41B29
ADS41B49
www.ti.com
SBAS486E – NOVEMBER 2009 – REVISED JULY 2012
ELECTRICAL CHARACTERISTICS: GENERAL
Typical values are at +25°C, AVDD = 1.8V, AVDD_BUF = 3.3V, DRVDD = 1.8V, and 50% clock duty cycle, unless otherwise
noted. Minimum and maximum values are across the full temperature range: TMIN = –40°C to TMAX = +85°C, AVDD = 1.8V,
AVDD_BUF = 3.3V, and DRVDD = 1.8V.
ADS41B29, ADS41B49
PARAMETER
MIN
TYP
MAX
UNIT
ANALOG INPUTS
Differential input voltage range
1.5
VPP
Differential input resistance, at dc (see Figure 60)
10
k
Ω
Differential input capacitance (see Figure 61)
3.5
pF
Analog input bandwidth
800
MHz
Analog input common-mode current (per input pin)
2
µA
Common-mode output voltage
VCM
1.7
V
VCM output current capability
4
mA
DC ACCURACY
Offset error
–15
2.5
15
mV
Temperature coefficient of offset error
0.003
mV/°C
Gain error as a result of
EGREF
–2
2
%FS
internal reference inaccuracy alone
Gain error of channel alone
EGCHAN
2.5
%FS
POWER SUPPLY
IAVDD
99.5
115
mA
Analog supply current
IAVDD_BUF
29
42
mA
Analog input buffer supply current
IDRVDD(1)
Output buffer supply current
63
mA
LVDS interface with 100
Ω external termination
Low LVDS swing (200mV)
IDRVDD
Output buffer supply current
75
90
mA
LVDS interface with 100
Ω external termination
Standard LVDS swing (350mV)
IDRVDD output buffer supply current(1)(2)
CMOS interface(2)
35
mA
8pF external load capacitance
fIN = 2.5MHz
Global power-down
10
25
mW
Standby
200
mW
(1)
The maximum DRVDD current with CMOS interface depends on the actual load capacitance on the digital output lines. Note that the
maximum recommended load capacitance on each digital output line is 10pF.
(2)
In CMOS mode, the DRVDD current scales with the sampling frequency, the load capacitance on output pins, input frequency, and the
supply voltage (see the CMOS Interface Power Dissipation section in the Application Information).
Copyright © 2009–2012, Texas Instruments Incorporated
5


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