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ADS7881 Arkusz danych(PDF) 7 Page - Burr-Brown (TI) |
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ADS7881 Arkusz danych(HTML) 7 Page - Burr-Brown (TI) |
7 / 31 page ADS7881 SLAS400B − SEPTEMBER 2003 − REVISED NOVEMBER 2005 www.ti.com 7 TERMINAL FUNCTIONS NAME NO. PFB NO. RGZ I/O DESCRIPTION DATA BUS 8-Bit Bus 16-Bit Bus DATA BUS BYTE = 0 BYTE = 1 BYTE = 0 DB11 16 28 O D11 (MSB) D3 D11 (MSB) DB10 17 29 O D10 D2 D10 DB9 18 30 O D9 D1 D9 DB8 19 31 O D8 D0 (LSB) D8 DB7 20 32 O D7 0 D7 DB6 21 33 O D6 0 D6 DB5 22 34 O D5 0 D5 DB4 23 35 O D4 0 D4 DB3 26 38 O D3 0 D3 DB2 27 39 O D2 0 D2 DB1 28 40 O D1 0 D1 DB0 29 41 O D0 (LSB) 0 D0 (LSB) CONTROL PINS CS 42 6 I Chip select. Active low signal enables chip operation like acquisition start, conver- sion start, bus release from 3-state. Refer to the timing diagrams for more details. CONVST 40 4 I Conversion start. The rising edge starts the acquisition. The falling edge of this input ends the acquisition and starts the conversion. Refer to the timing diagrams for more details. RD 41 5 I Active low synchronization pulse for the parallel output. When CS is low, this serves as the output enable and puts the previous conversion results on the bus. A_PWD 37 1 I Nap mode enable, active low PWD/RST 38 2 I Active low input, acts as device power down/device reset signal. BYTE 39 3 I Byte select input. Used for 8-bit bus reading. 0: No fold back 1: Lower byte D[3:0] is folded back to high byte so D3 is available in D11 place. STATUS OUTPUT BUSY 36 48 O Status output. High when a conversion is in progress. POWER SUPPLY +VBD 24, 34 36, 46 − Digital power supply for all digital inputs and outputs. Refer to Table 3 for layout guidelines. BDGND 25, 35 37, 47 − Digital ground for all digital inputs and outputs. Short to analog ground plane below the device. +VA 4, 9, 10, 13, 43, 46 7, 10, 16, 21, 22, 25 − Analog power supplies. Refer to Table 3 for layout guidelines. AGND 5, 8, 11, 12, 14, 15, 44, 45 8, 9, 17, 20, 23, 24, 26, 27 − Analog ground pins. Short to analog ground plane below the device. ANALOG INPUT +IN 6 18 I Noninverting analog input channel −IN 7 19 I Inverting analog input channel REFIN 1 13 I Reference (positive) input. Needs to be decoupled with REFM pin using 0.1- µF by- pass capacitor and 1- µF storage capacitor. REFOUT 2 14 O Internal reference output. To be shorted to REFIN pin when internal reference is used. Do not connect to REFIN pin when external reference is used. Always needs to be decoupled with AGND using 0.1- µF bypass capacitor. REFM 47, 48 11, 12 I Reference ground. Connect to analog ground plane. NC 3, 30, 31, 32, 33 15, 42, 43, 44, 45 − No connection |
Podobny numer części - ADS7881_13 |
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Podobny opis - ADS7881_13 |
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