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ADUM5010 Arkusz danych(PDF) 9 Page - Analog Devices

Numer części ADUM5010
Szczegółowy opis  The ADuM50101 is an integrated, isolated dc-to-dc converter.
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Data Sheet
ADuM5010
Rev. A | Page 9 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
4
20
19
18
17
5
16
6
15
7
14
8
9
10
13
12
11
ADuM5010
TOP VIEW
(Not to Scale)
GNDP
NC
NC
NC
GNDP
GNDP
NC
PDIS
VDDP
GNDP
NC
GNDISO
GNDISO
GNDISO
GNDISO
NC
NC
NC
VSEL
VISO
NOTES
1. PINS LABELED NC CAN BE ALLOWED
TO FLOAT, BUT IT IS BETTER TO
CONNECT THESE PINS TO GROUND.
AVOID ROUTING HIGH SPEED SIGNALS
THROUGH THESE PINS BECAUSE NOISE
COUPLING MAY RESULT.
Figure 3. Pin Configuration
Table 15. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 3, 4, 7, 14,
17, 18, 20
NC
This pin is not connected internally (see Figure 3).
2, 5, 6, 10
GNDP
Ground 1. Ground reference for isolator primary. Pin 2 and Pin 10 are internally connected, and it is recommended
that all pins be connected to a common ground.
8
PDIS
Power Disable. When this pin is tied to GNDP the power converter is active; when a logic high voltage is applied,
the power supply enters a low power standby mode.
9
VDDP
Primary Supply Voltage, 3.0 V to 5.5 V.
11, 15, 16, 19 GNDISO
Ground Reference for Isolator Side 2. Pin 19 and Pin 11 are internally connected, and it is recommended that all pins
be connected to a common ground.
12
VISO
Secondary Supply Voltage Output for External Loads, 3.15 V to 5.5 V depending on voltage divider connected
to VSEL.
13
VSEL
Output Voltage select input. A voltage divider attached to this pin between VISO and GNDISO determines the
value of VISO, see Equation 1.
TRUTH TABLE
Table 16. Truth Table (Positive Logic)
VDDP (V)
VSEL Input
PDIS Input
VISO Output (V)
Notes
5
R1 = 10 kΩ, R2 = 30.9 kΩ
Low
5
5
R1 = 10 kΩ, R2 = 30.9 kΩ
High
0
3.3
R1 = 10 kΩ, R2 = 16.9 kΩ
Low
3.3
3.3
R1 = 10 kΩ, R2 = 16.9 kΩ
High
0
5
R1 = 10 kΩ, R2 = 16.9 kΩ
Low
3.3
5
R1 = 10 kΩ, R2 = 16.9 kΩ
High
0
3.3
R1 = 10 kΩ, R2 = 30.9 kΩ
Low
5
Configuration not recommended
3.3
R1 = 10 kΩ, R2 = 30.9 kΩ
High
0


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