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FM3580 Rev. A.5

Y[0:4]

Non_Mux_Out

I[0:4]

I[0:4]

Mux_Sel

/Override

/Override

Level

Mux_Sel

Level

MXSB MXSA

I4

I3

I2

I1

I0

BIT 7

BIT 0

MXSB MXSA

I4

NMO

I3

I2

I1

I0

BIT 7

BIT 0

SOPR-A

µ

SOPR-B

5

5

2

NMO

Output

Control

Output

Control

&

Latch

Note: Bit7 and Bit 6 are common to both the SOPR-A and SOPR-B registers

Multiplexer Block Diagram

Table 1. Multiplexer Path Control

/Override

Mux_Sel

MXSB

MXSA

Y-Port Outputs

Non_Mux_Out

Signal

Signal

Bit

Bit

Y[4:0]

Signal

0

0

X

X

Logic “0”

Logic “0”

X

1

X

X

I-Port Inputs

Latched Non_Mux_Out

I[4:0]

(see Note)

1000

Data from SOPR-A register

Data from SOPR-A register

0

1

Data from SOPR-B register

Data from SOPR-B register

1

0

I-Port Inputs

Latched Non_Mux_Out

I[4:0]

(see Note)

1

1

Reserved (Do Not Use)

Reserved (Do Not Use)

Note: Latched Non_Mux_Out is the data that was present at NMO multiplexer input during the rising edge of Mux_sel signal.