ADM7160AUJZ-3.3-R2 datasheet(5/24 Pages) AD

Numer części	ADM7160AUJZ-3.3-R2

Szczegółowy opis	Ultralow Noise, 200 mA Linear Regulator

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Data Sheet

ADM7160

Rev. 0 | Page 5 of 24

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

VIN to GND

−0.3 V to +6.5 V

VOUT to GND

−0.3 V to VIN

EN to GND

−0.3 V to +6.5 V

Storage Temperature Range

−65°C to +150°C

Operating Junction Temperature Range

−40°C to +125°C

Operating Ambient Temperature Range

−40°C to +125°C

Soldering Conditions

JEDEC J-STD-020

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

THERMAL DATA

Absolute maximum ratings apply individually only, not in

combination. The ADM7160 can be damaged when the junc-

tion temperature limits are exceeded. Monitoring ambient

temperature does not guarantee that TJ is within the specified

temperature limits.

In applications with high power dissipation and poor PCB

thermal resistance, the maximum ambient temperature may

need to be derated. In applications with moderate power

dissipation and low PCB thermal resistance, the maximum

ambient temperature can exceed the maximum limit as long

as the junction temperature is within the specification limits.

The junction temperature (TJ) of the device is dependent on the

ambient temperature (TA), the power dissipation of the device

(PD), and the junction-to-ambient thermal resistance of the

package (θJA). TJ is calculated using the following formula:

TJ = TA + (PD × θJA)

The junction-to-ambient thermal resistance (θJA) of the package

is based on modeling and calculation using a 4-layer board. θJA

is highly dependent on the application and board layout. In appli-

cations where high maximum power dissipation exists, close

attention to thermal board design is required. The value of θJA

may vary, depending on PCB material, layout, and environmental

conditions.

The specified values of θJA are based on a 4-layer, 4 inch × 3 inch

printed circuit board (PCB). See JEDEC JESD51-7 and JESD51-9

for detailed information about board construction. For more infor-

mation about the LFCSP package, see the AN-772 Application

Note, A Design and Manufacturing Guide for the Lead Frame Chip

Scale Package (LFCSP).

ΨJB is the junction-to-board thermal characterization parameter

with units of °C/W. ΨJB of the package is based on modeling and

calculation using a 4-layer board.

JEDEC JESD51-12, Guidelines for Reporting and Using Electronic

Package Thermal Information, states that thermal characterization

parameters are not the same as thermal resistances. ΨJB measures

the component power flowing through multiple thermal paths,

rather than through a single path as in thermal resistance (θJB).

Therefore, ΨJB thermal paths include convection from the top of

the package, as well as radiation from the package, factors that

make ΨJB more useful in real-world applications.

Maximum junction temperature (TJ) is calculated from the

board temperature (TB) and the power dissipation (PD) using

the following formula:

TJ = TB + (PD × ΨJB)

See JEDEC JESD51-8 and JESD51-12 for more detailed infor-

mation about ΨJB.

THERMAL RESISTANCE

θJA and ΨJB are specified for the worst-case conditions, that is, a

device soldered in a circuit board for surface-mount packages.

Table 4. Thermal Resistance

Package Type

θJA

ΨJB

Unit

5-Lead TSOT

170

43

°C/W

6-Lead LFCSP

63.6

28.3

°C/W

ESD CAUTION

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