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74FCT163373PV Arkusz danych(PDF) 1 Page - Integrated Device Technology |
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74FCT163373PV Arkusz danych(HTML) 1 Page - Integrated Device Technology |
1 / 7 page 1 IDT74FCT163373A/C 3.3V CMOS 16-BIT TRANSPARENT LATCH INDUSTRIALTEMPERATURERANGE OCTOBER 2008 INDUSTRIAL TEMPERATURE RANGE The IDT logo is a registered trademark of Integrated Device Technology, Inc. © 2002 Integrated Device Technology, Inc. DSC-5416/5 FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) •VCC = 3.3V ± 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended Range • CMOS power levels (0.4 μμμμμ W typ. static) • Rail-to-rail output swing for increased noise margin • Low Ground Bounce (0.3V typ.) • Inputs (except I/O) can be driven by 3.3V or 5V components • Available in SSOP and TSSOP packages FUNCTIONAL BLOCK DIAGRAM IDT74FCT163373A/C 3.3V CMOS 16-BIT TRANSPARENT LATCH DESCRIPTION: The FCT163373 16-bit transparent D-type latches are built using advanced dual metal CMOS technology. These high-speed, low-power latches are ideal for temporary storage of data. They can be used for implementing memory address latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls are organized to operate each device as two 8-bit latches or one 16-bit latch. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The inputs of FCT163373 can be driven from either 3.3V or 5V devices. This feature allows the use of these transparent latches as translators in a mixed 3.3V/5V supply system. With xLE inputs high, the FCT163373 can be used as a buffer to connect 5V components to a 3.3V bus. 2 O1 2 OE 2 LE 2 D1 TO SEVEN OTHER CHANNELS C D 1 OE 1 LE 1 O1 1 D1 TO SEVEN OTHER CHANNELS C D 1 48 47 2 24 25 36 13 |
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