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ADXL362BCCZ-R2 Arkusz danych(PDF) 31 Page - Analog Devices |
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ADXL362BCCZ-R2 Arkusz danych(HTML) 31 Page - Analog Devices |
31 / 44 page Data Sheet ADXL362 Rev. B | Page 31 of 44 FIFO SAMPLES REGISTER Address: 0x29, Reset: 0x80, Name: FIFO_SAMPLES The value in this register specifies the number of samples to store in the FIFO. The AH bit in the FIFO_CONTROL register (Address 0x28) is used as the MSB of this value. The full range of FIFO samples is 0 to 511. The default value of this register is 0x80 to avoid triggering the FIFO watermark interrupt (see the FIFO Watermark section for more information). The following bit map is duplicated from the FIFO Control Register section to indicate the AH bit. INT1/INT2 FUNCTION MAP REGISTERS The INT1 and INT2 registers configure the INT1/INT2 interrupt pins, respectively. Bits[B6:B0] select which function(s) generate an interrupt on the pin. If its corresponding bit is set to 1, the function generates an interrupt on the INT pin. Bit B7 configures whether the pin operates in active high (B7 low) or active low (B7 high) mode. Any number of functions can be selected simultaneously for each pin. If multiple functions are selected, their conditions are OR'ed together to determine the INT pin state. The status of each individual function can be determined by reading the STATUS register. If no interrupts are mapped to an INT pin, the pin remains in a high impedance state, held to a valid logic state by a bus keeper. Address: 0x2A, Reset: 0x00, Name: INTMAP1 Table 15. Bit Descriptions for INTMAP1 Bits Bit Name Settings Description Reset Access 7 INT_LOW 1 = INT1 pin is active low. 0x0 RW 6 AWAKE 1 = maps the awake status to INT1 pin. 0x0 RW 5 INACT 1 = maps the inactivity status to INT1 pin. 0x0 RW 4 ACT 1 = maps the activity status to INT1 pin. 0x0 RW 3 FIFO_OVERRUN 1 = maps the FIFO overrun status to INT1 pin. 0x0 RW 2 FIFO_WATERMARK 1 = maps the FIFO watermark status to INT1 pin. 0x0 RW 1 FIFO_READY 1 = maps the FIFO ready status to INT1 pin. 0x0 RW 0 DATA_READY 1 = maps the data ready status to INT1 pin. 0x0 RW |
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