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AD8108AST Arkusz danych(PDF) 11 Page - Analog Devices

Numer części AD8108AST
Szczegółowy opis  325 MHz, 8 횞 8 Buffered Video Crosspoint Switches
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
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AD8108/AD8109
Rev. B | Page 10 of 32
Table 8. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 3, 5, 7, 9, 11, 13, 15
INxx
Analog Inputs. xx = Channels 00 through 07.
57
DATA IN
Serial Data Input, TTL Compatible.
58
CLK
Clock, TTL Compatible. Falling edge triggered.
59
DATA OUT
Serial Data Output, TTL Compatible.
56
UPDATE
Enable (Transparent) Low. Allows serial register to connect directly to switch matrix. Data
latched when high.
61
RESET
Disable Outputs, Active Low.
60
CE
Chip Enable, Enable Low. Must be low to clock in and latch data.
55
SER/PAR
Selects Serial Data Mode, Low or Parallel, High. Must be connected.
41, 38, 35, 32, 29, 26, 23, 20
OUTyy
Analog Outputs. yy = Channels 00 through 07.
2, 4, 6, 8, 10, 12, 14, 16, 46
AGND
Analog Ground for Inputs and Switch Matrix.
63, 79
DVCC
5 V for Digital Circuitry
62, 80
DGND
Ground for Digital Circuitry
17, 45
AVEE
−5 V for Inputs and Switch Matrix.
18, 44
AVCC
+5 V for Inputs and Switch Matrix.
42, 39, 36, 33, 30, 27, 24, 21
AGNDxx
Ground for Output Amp. xx = Output Channels 00 through 07. Must be connected.
43, 37, 31, 25, 19
AVCCxx/yy
+5 V for Output Amplifier that is Shared by Channels xx and yy. Must be connected.
40, 34, 28, 22
AVEExx/yy
−5 V for Output Amplifier that is Shared by Channels xx and yy. Must be connected.
54
A0
Parallel Data Input, TTL Compatible (output select LSB).
53
A1
Parallel Data Input, TTL Compatible (output select).
52
A2
Parallel Data Input, TTL Compatible (output select MSB).
51
D0
Parallel Data Input, TTL Compatible (input select LSB).
50
D1
Parallel Data Input, TTL Compatible (input select).
49
D2
Parallel Data Input, TTL Compatible (input select MSB).
48
D3
Parallel Data Input, TTL Compatible (output enable).
47, 64 to 78
NC
No Connect.


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