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TPL5000 Arkusz danych(PDF) 3 Page - Texas Instruments

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Numer części TPL5000
Szczegółowy opis  TPL5000 Nano Power Programmable Timer with Watchdog Functionality
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TPL5000 Arkusz danych(HTML) 3 Page - Texas Instruments

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D0
D1
TPL5000
D2
VDD
PGOOD
RSTn
WAKE
TCAL
GND
DONE
TPL5000
www.ti.com
SNAS628A – JULY 2013 – REVISED JULY 2013
PIN FUNCTIONS
Connection Diagram
Figure 2. Top View
10-Lead VSSOP
Pin Descriptions
Pin(s)
Name
Description
Application Information
1
D0
Logic Input to set period delay (tDP)
Connect to either GND (low logic value) or VDD (high logic
value)
2
D1
Logic Input to set period delay (tDP)
Connect to either GND (low logic value) or VDD (high logic
value)
3
D2
Logic Input to set period delay (tDP)
Connect to either GND (low logic value) or VDD (high logic
value)
4
VDD
Supply voltage
5
GND
Ground
6
DONE
Logic Input for watchdog functionality
7
TCAL
Short duration pulse output for estimation
of TPL5000 timer delay.
8
WAKE
Timer output signal generated every tDP
period.
9
RSTn
Reset Output (open drain output)
10
PGOOD
Digital power good input
Copyright © 2013, Texas Instruments Incorporated
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