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AD9516-1 Arkusz danych(PDF) 2 Page - Analog Devices |
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AD9516-1 Arkusz danych(HTML) 2 Page - Analog Devices |
2 / 8 page CN-0243 Circuit Note Rev. 0 | Page 2 of 8 of this circuit is good enough to enable both ZIF (zero IF/ baseband) and CIF (complex IF up to 200 MHz to 300 MHz). The AD9122 has the option of up to 8× interpolation, as well as a 32-bit NCO for very fine IF frequency selectivity. Overall performance of a transmitter is highly dependent on the dynamic range of the components directly in the signal chain. In a mixed-signal transmitter using a DAC and IQ modulator, the noise floor and distortion characteristics of these components define the overall dynamic range of the signal chain. However, the noise floor of the DAC can also be degraded by sample clock jitter, and the IQ modulator performance is dependent on the noise and spur characteristics of its local oscillator (LO). Using high performance components for sample clock and LO generation is, therefore, key to a high performance transmitter. In addition, generating these signals physically close to the DAC and modulator on the PCB and using a single external reference can make the design much simpler. Generating the sample clock and LO (LO is very often a multi-GHz signal) separately and at some distance from the DAC and IQ modulator requires great care in the PCB layout. Subtle layout errors can cause coupling to and from these critical signals and degrade overall signal chain performance. The signal chain performance is also heavily dependent on the DAC/ IQ modulator interface filter. For optimal performance, this passive filter should be designed after careful analysis of the required system specifications. The ADRF6702 includes an on-board fractional PLL for LO generation so that a low frequency reference (typically less than 100 MHz) is all that is necessary to synthesize the IQ modulator LO. Using the PLL in the AD9516 clock generator allows a single reference to generate both the DAC sample clock and the PLL reference for the ADRF6702. The circuit in Figure 1 was built using the AD9516-0, but other members of the AD9516 family could be used depending on the desired internal VCO frequency. CIRCUIT DESCRIPTION ADRF6702 IQ Modulator with Internal LO Synthesizer, Synthesizer IQ Modulator Interface The ADRF6702 IQ modulator is a unique device in several respects. In addition to its exceptional dynamic range, it also includes a fractional-N PLL, which allows programming of discrete LO frequency steps of less than 25 kHz while at the same time keeping the overall frequency multiplication small enough to avoid a large increase in phase noise from the reference to the synthesizer output. Another aspect of the ADRF6702 is the divide-by-2 architecture of the IQ modulator. Traditional IQ modulators accept an LO input frequency at 1× the desired LO. Internally, a distributed RC network creates the desired in-phase and quadrature LO signals from the single LO frequency input. Because this is a passive RC network, the bandwidth over which quadrature modulation accuracy is achieved is limited. Also, for good quadrature accuracy, the external LO should be spectrally pure. Harmonics on the LO with this traditional IQ modulator architecture can degrade the overall modulation accuracy. For this reason, when using a PLL synthesizer to generate an LO signal for an IQ modulator, a sharp band-pass or low-pass filter is often required at the IQ modulator LO input. In the divide-by-2 LO architecture of the ADRF6702, a simple digital divider is used internally to create nearly perfect quadrature over a wide band. The PLL synthesizer generates the 2× LO internally, so that it does not have to be distributed around the PCB, and no filter is required between the synthesizer and IQ modulator LO because the 2× LO architecture is only sensitive to the edges of the LO signal, not the frequency content. For a detailed descripton of the effects of LO harmonics on a 1× IQ modulator and the design of the LO filter, see Circuit Note CN-0134. Sampled Signal to RF, Overall Spur Floor A baseband signal goes through a number of steps on the way to the RF transmit frequency. The signal begins in the discrete –4x –245.76 –184.32 –122.88 –61.44 61.44 122.88 184.32 245.76 DC FREQUENCY FREQUENCY (x-FDATA) 0dB –20dB –40dB –60dB –80dB –100dB –3x –2x –1x DC 1x 2x 3x 4x Figure 2. DAC Output Spectrum, Solid Blue Line Represents Baseband Signal and Images, Dotted Red Line Represents DAC Sinc Function |
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