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DM7332G Arkusz danych(PDF) 7 Page - Power-One

Numer części DM7332G
Szczegółowy opis  DM7300G Series Digital Power Manager
Download  36 Pages
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Producent  POWER-ONE [Power-One]
Strona internetowa  http://www.power-one.com
Logo POWER-ONE - Power-One

DM7332G Arkusz danych(HTML) 7 Page - Power-One

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ZD-00896 Rev. 5.2, 9-Apr-13
www.power-one.com
Page 7 of 36
8.4
I2C Interface
Parameter
Conditions/Description
Min
Nom
Max
Units
ViL
Input low voltage
-0.5
0.3·VDD
V
ViH
Input high voltage
0.7·VDD
VDD+0.5
V
Vhys
Input hysteresis
0.05·VDD
V
VoL
Output low voltage, ISINK=3mA
0
0.4
V
tr
Rise time for SDA and SCL
20+0.1Cb
1
300
ns
tof
Output fall time from ViHmin to ViLmax
20+0.1Cb
1
250
ns
Ii
Input current each I/O pin, 0.1VDD<Vi<0.9VDD
-10
10
µ
A
Ci
Capacitance for each I/O pin
10
pF
fSCL
SCL clock frequency
0
400
kHz
Standard-Mode I
2C (f
SCL
≤ 100kHz)
RPU
External pull-up resistor
1
1000/Cb
1
k
tHDSTA
Hold time (repeated) START condition
4.0
µ
s
tLOW
Low period of the SCL clock
4.7
µ
s
tHIGH
High period of the SCL clock
4.0
µ
s
tSUSTA
Setup time for a repeated START condition
4.7
µ
s
tHDDAT
Data hold time
0
3.45
µ
s
tSUDAT
Data setup time
250
ns
tSUSTD
Setup time for STOP condition
4.0
µ
s
tSUF
Bus free time between a STOP and START condition
4.7
µ
s
Fast-Mode
I2C (100kHz < fSCL≤ 400kHz)
RPU
External pull-up resistor
1
300/Cb
1
k
tHDSTA
Hold time (repeated) START condition
0.6
µ
s
tLOW
Low period of the SCL clock
1.3
µ
s
tHIGH
High period of the SCL clock
0.6
µ
s
tSUSTA
Setup time for a repeated START condition
0.6
µ
s
tHDDAT
Data hold time
0
0.9
µ
s
tSUDAT
Data setup time
100
ns
tSUSTD
Setup time for STOP condition
0.6
µ
s
tSUF
Bus free time between a STOP and START condition
1.3
µ
s
______________________________________
1 Cb – bus capacitance in pF, typically from 10pF to 400pF


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