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ADS1220 Arkusz danych(PDF) 7 Page - Texas Instruments |
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ADS1220 Arkusz danych(HTML) 7 Page - Texas Instruments |
7 / 54 page 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 CLK DGND AVSS AIN3/REFN1 AIN0/REFP1 AVDD DVDD DRDY ADS1220 www.ti.com SBAS501A – MAY 2013 – REVISED JULY 2013 PIN CONFIGURATIONS RVA PACKAGE QFN-16 (TOP VIEW) PIN DESCRIPTIONS (QFN PACKAGE) ANALOG OR DIGITAL NAME PIN NO. INPUT/OUTPUT DESCRIPTION CLK 1 Digital input External clock source pin; connect to DGND if not used DGND 2 Digital Digital ground AVSS 3 Analog Negative analog power supply AIN3/REFN1 4 Analog input Differential or single-ended input; negative reference input AIN2 5 Analog input Differential or single-ended input REFN0 6 Analog input Negative reference input REFP0 7 Analog input Positive reference input AIN1 8 Analog input Differential or single-ended input AIN0/REFP1 9 Analog input Differential or single-ended input; positive reference input AVDD 10 Analog Positive analog power supply DVDD 11 Digital Positive digital power supply DRDY 12 Digital output Data ready; active low DOUT/DRDY 13 Digital output Serial data output combined with data ready; active low DIN 14 Digital input Serial data input SCLK 15 Digital input Serial clock input CS 16 Digital input Chip select; active low Thermal pad Thermal pad — Thermal power pad. Do not connect or only connect to AVSS. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: ADS1220 |
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