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TDA8950J-N1112 Arkusz danych(PDF) 11 Page - NXP Semiconductors |
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TDA8950J-N1112 Arkusz danych(HTML) 11 Page - NXP Semiconductors |
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11 / 39 page  TDA8950_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 11 June 2009 11 of 39 NXP Semiconductors TDA8950 2 × 150 W class-D power amplifier 8.3.4 Supply voltage protection If the supply voltage drops below the minimum supply voltage threshold, VP(uvp), the UVP circuit will be activated and the system will shut down. Once the supply voltage rises above VP(uvp) again, the system will restart after a delay of 100 ms. If the supply voltage exceeds the maximum supply voltage threshold, VP(ovp), the OVP circuit will be activated and the power stages will be shut down. When the supply voltage drops below VP(ovp) again, the system will restart after a delay of 100 ms. An additional UnBalance Protection (UBP) circuit compares the positive analog supply voltage (on pin VDDA) with the negative analog supply voltage (on pin VSSA) and is triggered if the voltage difference exceeds a factor of two (VDDA > 2 ×|VSSA| OR |VSSA| > 2 × V DDA). When the supply voltage difference drops below the unbalance threshold, VP(ubp), the system restarts after 100 ms. An overview of all protection circuits and their respective effects on the output signal is provided in Table 5. [1] Amplifier gain depends on the junction temperature and heatsink size. [2] The amplifier shuts down completely only if the short-circuit impedance is below the impedance threshold (Zth; see Section 8.3.2). In all other cases, current limiting results in a clipped output signal. [3] Fault condition detected during any Standby-to-Mute transition or during a restart after OCP has been activated (short-circuit to one of the supply lines). 8.4 Differential audio inputs The audio inputs are fully differential ensuring a high common mode rejection ratio and maximum flexibility in the application. • Stereo operation: to avoid acoustical phase differences, the inputs should be in antiphase and the speakers should be connected in antiphase. This configuration: – minimizes power supply peak current – minimizes supply pumping effects, especially at low audio frequencies • Mono BTL operation: the inputs must be connected in anti-parallel. The output of one channel is inverted and the speaker load is connected between the two outputs of the TDA8950. In practice (because of the OCP threshold) the output power can be boosted to twice the output power that can be achieved with the single-ended configuration. The input configuration for a mono BTL application is illustrated in Figure 7. Table 5. Overview of TDA8950 protection circuits Protection name Complete shutdown Restart directly Restart after 100 ms Pin PROT detection TFB[1] NNNN OTP Y N Y N OCP Y[2] N[2] Y[2] Y WP N[3] YN N UVP YN YN OVP Y N Y N UBP YN YN |
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