 |
Zakładka z wyszukiwarką danych komponentów |
|
|
Zakładka z wyszukiwarką danych komponentów |
|
ADS58H40IZCRR Arkusz danych(PDF) 11 Page - Texas Instruments |
|
|
||||||||||||||||||||||||||||||
ADS58H40IZCRR Arkusz danych(HTML) 11 Page - Texas Instruments |
|
|
11 / 59 page  ADS58H40 www.ti.com SBAS589B – AUGUST 2012 – REVISED NOVEMBER 2012 PIN FUNCTIONS PIN I/O DESCRIPTION NAME NUMBER AINM B12 I Negative differential analog input for channel A AINP C12 I Positive differential analog input for channel A AVDD33 B6, B7, E1, E2, E11, E12 I Analog 3.3-V power supply A1, A2, A5, A8, A11, A12, AVDD B3, B4, B9, B10, D1, D2, I Analog 1.9-V power supply D11, D12 B2, B5, B8, B11, C2-C5, AVSS I Analog ground C8-C11, D4-D9 BINM A9 I Negative differential analog input for channel B BINP A10 I Positive differential analog input for channel B CINM A3 I Negative differential analog input for channel C CINP A4 I Positive differential analog input for channel C CLKINM C6 I Negative differential clock input CLKINP C7 I Positive differential clock input CLKOUTABM M9 O Negative differential LVDS clock output for channel A and B CLKOUTABP M10 O Positive differential LVDS clock output for channel A and B CLKOUTCDM M4 O Negative differential LVDS clock output for channels C and D CLKOUTCDP M3 O Positive differential LVDS clock output for channels C and D DAB[13:1]P, DDR LVDS outputs for channels A and B. F11, F12, G11, G12, DAB0P/OVRABP, In 11-bit mode, DAB13 is the MSB, DAB3 is the LSB, and DAB0 is the over-range (OVR) bit. H9-H12, J8-J12, K8-K12, O DAB[13:1]M, In 14-bit burst mode, DAB13 is the MSB and DAB0 is the LSB. There is no OVR bit in this L7-L12, M7, M8, M11, M12 DAB0M/OVRABM mode. DCD[13:1]P, DDR LVDS outputs for channels C and D. F1, F2, G1, G2, H1-H4, DCD0P/OVRCDP, In 11-bit mode, DCD13 is the MSB, DCD3 is the LSB, and DCD0 is the OVR bit. J1-J5, K1-K5, L1-L6, M1, O DCD[13:1]M, In 14-bit burst mode, DCD13 is the MSB and DCD0 is the LSB. There is no OVR bit in this M2, M5, M6 DCD0M/OVRCDM mode. DINM C1 I Negative differential analog input for channel D DINP B1 I Positive differential analog input for channel D F3, F10, H5-H8, J6, J7, K6, DRVDD I Digital 1.8-V power supply K7 DRVSS E4-E9, F4-F9 I Digital ground HIRES G5 O Indication in burst mode if output data is high or low resolution PDN E10 I Power-down control; active high. Logic high is power down. RESET G6 I Hardware reset; active high SCLK G7 I Serial interface clock input SDATA G8 I Serial interface data input SDOUT G10 O Serial interface data output SEN G9 I Serial interface enable SNRB E3 I SNRB enable; active high TRIG_EN G3 I Trigger burst mode; active high TRIG_RDY G4 O Indication if ADC is ready for another high-resolution burst mode VCM A6, A7, D3, D10 O Common-mode voltage for analog inputs. All VCM pins are internally connected together. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: ADS58H40 |
Podobny numer części - ADS58H40IZCRR |
|
Podobny opis - ADS58H40IZCRR |
|
|
Link URL |
| Polityka prywatności |
| ALLDATASHEET.PL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Polish ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
