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ADC101S021 Arkusz danych(PDF) 7 Page - Texas Instruments

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Numer części ADC101S021
Szczegółowy opis  ADC121S021 Single Channel, 50 to 200 ksps, 12-Bit A/D Converter
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Strona internetowa  http://www.ti.com
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ADC101S021 Arkusz danych(HTML) 7 Page - Texas Instruments

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Z2
Z1
Z0
DB11
DB3
DB2
DB1
DB0
tQUIET
Track
3 leading zero bits
12 data bits
CS
SCLK
SDATA
1
2
3
4
5
12
13
14
15
16
TRI-STATE
tSU
tCL
tEN
tCH
tACC
tH
tDIS
tCS
Hold
tACQ
17
18
19
20
ADC121S021
www.ti.com
SNAS305H – JULY 2005 – REVISED MARCH 2013
Figure 3. ADC121S021 Serial Timing Diagram
Specification Definitions
ACQUISITION TIME is the time required to acquire the input voltage. That is, it is time required for the hold
capacitor to charge up to the input voltage. Acquisition time is measured backwards from the falling edge of CS
when the signal is sampled and the part moves from track to hold. The start of the time interval that contains
TACQ is the 13th rising edge of SCLK of the previous conversion when the part moves from hold to track. The
user must ensure that the time between the 13th rising edge of SCLK and the falling edge of the next CS is not
less than TACQ to meet performance specifications.
APERTURE DELAY is the time after the falling edge of CS to when the input signal is acquired or held for
conversion.
APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample.
Aperture jitter manifests itself as noise in the output.
CONVERSION TIME is the time required, after the input voltage is acquired, for the ADC to convert the input
voltage to a digital word. This is from the falling edge of CS when the input signal is sampled to the 16th falling
edge of SCLK when the SDATA output goes into TRI-STATE.
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1
LSB.
DUTY CYCLE is the ratio of the time that a repetitive digital waveform is high to the total time of one period. The
specification here refers to the SCLK.
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE BITS) is another method of specifying Signal-to-Noise
and Distortion or SINAD. ENOB is defined as (SINAD
− 1.76) / 6.02 and says that the converter is equivalent to
a perfect ADC of this (ENOB) number of bits.
FULL POWER BANDWIDTH is a measure of the frequency at which the reconstructed output fundamental
drops 3 dB below its low frequency value for a full scale input.
GAIN ERROR is the deviation of the last code transition (111...110) to (111...111) from the ideal (VREF − 1.5
LSB), after adjusting for offset error.
INTEGRAL NON-LINEARITY (INL) is a measure of the deviation of each individual code from a line drawn from
negative full scale (½ LSB below the first code transition) through positive full scale (½ LSB above the last code
transition). The deviation of any given code from this straight line is measured from the center of that code value.
INTERMODULATION DISTORTION (IMD) is the creation of additional spectral components as a result of two
sinusoidal frequencies being applied to the ADC input at the same time. It is defined as the ratio of the power in
the second and third order intermodulation products to the sum of the power in both of the original frequencies.
IMD is usually expressed in dB.
Copyright © 2005–2013, Texas Instruments Incorporated
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