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AD9708ARZ Arkusz danych(PDF) 3 Page - Analog Devices

Numer części AD9708ARZ
Szczegółowy opis  8-Bit, 100 MSPS TxDAC D/A Converter
Download  16 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD9708ARZ Arkusz danych(HTML) 3 Page - Analog Devices

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DYNAMIC SPECIFICATIONS
Parameter
Min
Typ
Max
Units
DYNAMIC PERFORMANCE
Maximum Output Update Rate (fCLOCK)
100
125
MSPS
Output Settling Time (tST) (to 0.1%)
1
35
ns
Output Propagation Delay (tPD)1
ns
Glitch Impulse
5
pV-s
Output Rise Time (10% to 90%)
1
2.5
ns
Output Fall Time (10% to 90%)
1
2.5
ns
Output Noise (IOUTFS = 20 mA)
50
pA/
√Hz
Output Noise (IOUTFS = 2 mA)
30
pA/
√Hz
AC LINEARITY TO NYQUIST
Signal-to-Noise and Distortion Ratio
fCLOCK = 10 MSPS; fOUT = 1.00 MHz
50
dB
fCLOCK = 50 MSPS; fOUT = 1.00 MHz
50
dB
fCLOCK = 50 MSPS; fOUT = 12.51 MHz
48
dB
fCLOCK = 100 MSPS; fOUT = 5.01 MHz
50
dB
fCLOCK = 100 MSPS; fOUT = 25.01 MHz
45
dB
Total Harmonic Distortion
fCLOCK = 10 MSPS; fOUT = 1.00 MHz
–67
dBc
fCLOCK = 50 MSPS; fOUT = 1.00 MHz
–67
–62
dBc
fCLOCK = 50 MSPS; fOUT = 12.51 MHz
–59
dBc
fCLOCK = 100 MSPS; fOUT = 5.01 MHz
–64
dBc
fCLOCK = 100 MSPS; fOUT = 25.01 MHz
–48
dBc
Spurious-Free Dynamic Range to Nyquist
fCLOCK = 10 MSPS; fOUT = 1.00 MHz
68
dBc
fCLOCK = 50 MSPS; fOUT = 1.00 MHz
62
68
dBc
fCLOCK = 50 MSPS; fOUT = 12.51 MHz
63
dBc
fCLOCK = 100 MSPS; fOUT = 5.01 MHz
67
dBc
fCLOCK = 100 MSPS; fOUT = 25.01 MHz
50
dBc
NOTES
1Measured single ended into 50
Ω load.
Specifications subject to change without notice.
DIGITAL SPECIFICATIONS
Parameter
Min
Typ
Max
Units
DIGITAL INPUTS
Logic “1” Voltage @ DVDD = +5 V
3.5
5
V
Logic “1” Voltage @ DVDD = +3 V
2.1
3
V
Logic “0” Voltage @ DVDD = +5 V
0
1.3
V
Logic “0” Voltage @ DVDD = +3 V
0
0.9
V
Logic “1” Current
–10
+10
µA
Logic “0” Current
–10
+10
µA
Input Capacitance
5pF
Input Setup Time (tS)2.0
ns
Input Hold Time (tH)1.5
ns
Latch Pulsewidth (tLPW)
3.5
ns
Specifications subject to change without notice.
0.1%
0.1%
tS
tH
tLPW
t
PD
t
ST
DB0–DB7
CLOCK
IOUTA
OR
IOUTB
Figure 1. Timing Diagram
(TMIN to TMAX , AVDD = +5 V, DVDD = +5 V, IOUTFS = 20 mA, Single-Ended Output, IOUTA, 50
Doubly
Terminated, unless otherwise noted)
AD9708
–3–
REV. B
(TMIN to TMAX, AVDD = +5 V, DVDD = +5 V, IOUTFS = 20 mA unless otherwise noted)


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