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AD9740-EB Arkusz danych(PDF) 6 Page - Analog Devices |
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AD9740-EB Arkusz danych(HTML) 6 Page - Analog Devices |
6 / 32 page AD9740 Rev. B | Page 6 of 32 Parameter Min Typ Max Unit Multitone Power Ratio (8 Tones at 400 kHz Spacing) fCLOCK = 78 MSPS; fOUT = 15.0 MHz to 18.2 MHz 0 dBFS Output 65 dBc −6 dBFS Output 66 dBc −12 dBFS Output 60 dBc −18 dBFS Output 55 dBc 1 Measured single-ended into 50 Ω load. 2 Output noise is measured with a full-scale output set to 20 mA with no conversion activity. It is a measure of the thermal noise only. 3 Noise spectral density is the average noise power normalized to a 1 Hz bandwidth, with the DAC converting and producing an output tone. DIGITAL SPECIFICATIONS TMIN to TMAX, AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD = 3.3 V, IOUTFS = 20 mA, unless otherwise noted. Table 3. Parameter Min Typ Max Unit DIGITAL INPUTS1 Logic 1 Voltage 2.1 3 V Logic 0 Voltage 0 0.9 V Logic 1 Current −10 +10 μA Logic 0 Current −10 +10 μA Input Capacitance 5 pF Input Setup Time (tS) 2.0 ns Input Hold Time (tH) 1.5 ns Latch Pulse Width (tLPW) 1.5 ns CLK INPUTS2 Input Voltage Range 0 3 V Common-Mode Voltage 0.75 1.5 2.25 V Differential Voltage 0.5 1.5 V 1 Includes CLOCK pin on SOIC/TSSOP packages and CLK+ pin on LFCSP package in single-ended clock input mode. 2 Applicable to CLK+ and CLK− inputs when configured for differential or PECL clock input mode. 0.1% 0.1% tS tH tPD DB0–DB9 CLOCK IOUTA OR IOUTB tLPW tST Figure 2. Timing Diagram |
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