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ADM6315-26D1ARTZRL Arkusz danych(PDF) 5 Page - Analog Devices

Numer części ADM6315-26D1ARTZRL
Szczegółowy opis  Open-Drain Microprocessor Supervisory Circuit in 4-Lead SOT-143
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Data Sheet
ADM6315
Rev. G | Page 5 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND
RESET
1
4
MR
VCC
2
3
ADM6315
TOP VIEW
(Not to Scale)
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
GND
Ground Reference for All Signals, 0 V.
2
RESET
Active Low Logic Output. RESET remains low while VCC is below the reset threshold or when MR is low. RESET
then remains low for a minimum of 1 ms, 20 ms, 140 ms, or 1120 ms after VCC rises above the reset threshold
and MR is high.
3
MR
Manual Reset. This active low debounced input ignores input pulses of 100 ns (typical) and is guaranteed to
accept input pulses of greater than 1 μs. Leave floating when not used.
4
VCC
Monitored Supply Voltage.


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