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ADV7202KSTZ Arkusz danych(PDF) 6 Page - Analog Devices

Numer części ADV7202KSTZ
Szczegółowy opis  Simultaneous Sampling Video Rate Codec
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REV. 0
–6–
ADV7202–SPECIFICATIONS
3.3 V SPECIFICATIONS (AVDD/DVDD = 3.3 V 5%, V
REF = 1.235 V, RSET = 1.2 k
, all specifications TMIN to TMAX, unless otherwise noted.)
Parameter
Min
Typ
Max
Unit
Test Conditions
POWER REQUIREMENTS
1
AVDD/DVDD
3.14
3.3
3.46
V
Normal Power Mode
IDAC
2
18
mA
IDSC
3
8mA
Inputs at Supply
IADC
4
80
mA
Sleep Mode Current
5
350
µA
Power-Up Time
4
ms
Internal Reference
MPU PORT
6—I2C
SCLOCK Frequency
0
400
kHz
SCLOCK High Pulsewidth, t1
0.6
µs
SCLOCK Low Pulsewidth, t2
1.3
µs
Hold Time (Start Condition), t3
0.6
µsAfter this period, the first clock is
generated.
Setup Time (Start Condition), t4
0.6
µsRelevant for Repeated Start Condition
Data Setup Time, t5
100
ns
SDATA, SCLOCK Rise Time, t6
300
ns
SDATA, SCLOCK Fall Time, t7
300
ns
Setup Time (Stop Condition), t8
0.6
µs
NOTES
1All DACs and ADCs on.
2I
DAC is the DAC supply current.
3I
DSC is the digital core supply current.
4I
ADC is the ADC supply current.
5This includes I
ADC, IDAC, and IDSC.
6Guaranteed by characterization.
Specifications subject to change without notice.


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