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ADXL350BCEZ-RL Arkusz danych(PDF) 15 Page - Analog Devices

Numer części ADXL350BCEZ-RL
Szczegółowy opis  Digital Accelerometer
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ADXL350BCEZ-RL Arkusz danych(HTML) 15 Page - Analog Devices

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Data Sheet
ADXL350
Rev. 0 | Page 15 of 36
POWER SAVINGS
Power Modes
The ADXL350 automatically modulates its power consumption
in proportion to its output data rate, as outlined in Table 7. If
additional power savings is desired, a lower power mode is
available. In this mode, the internal sampling rate is reduced,
allowing for power savings in the 12.5 Hz to 400 Hz data rate
range but at the expense of slightly greater noise.
To enter lower power mode, set the LOW_POWER bit (Bit 4) in
the BW_RATE register (Address 0x2C). The current consumption
in low power mode is shown in Table 8 for cases where there is
an advantage for using low power mode. The current consump-
tion values shown in Table 7 and Table 8 are for a VS of 2.5 V.
Current scales linearly with VS.
Table 7. Current Consumption vs. Data Rate
(TA = 25°C, VS = 2.5 V, VDDI/O= 1.8 V)
Output Data
Rate (Hz)
Bandwidth (Hz)
Rate Code
I
DD (µA)
3200
1600
1111
145
1600
800
1110
100
800
400
1101
145
400
200
1100
145
200
100
1011
145
100
50
1010
145
50
25
1001
100
25
12.5
1000
65
12.5
6.25
0111
55
6.25
3.125
0110
40
Table 8. Current Consumption vs. Data Rate, Low Power
Mode (TA = 25°C, VS = 2.5 V, VDDI/O= 1.8 V)
Output Data
Rate (Hz)
Bandwidth (Hz)
Rate Code
I
DD (µA)
400
200
1100
100
200
100
1011
65
100
50
1010
55
50
25
1001
50
25
12.5
1000
40
12.5
6.25
0111
40
Auto Sleep Mode
Additional power can be saved if the ADXL350 automatically
switches to sleep mode during periods of inactivity. To enable
this feature, set the THRESH_INACT register (Address 0x25)
and the TIME_INACT register (Address 0x26) each to a value
that signifies inactivity (the appropriate value depends on the
application), and then set the AUTO_SLEEP bit and the link bit in
the POWER_CTL register (Address 0x2D). Current consumption
at the sub-8 Hz data rates used in this mode is typically 40 µA
for a VS of 2.5 V.
Standby Mode
For even lower power operation, standby mode can be used. In
standby mode, current consumption is reduced to 0.1 µA (typical).
In this mode, no measurements are made. Standby mode is entered
by clearing the measure bit (Bit 3) in the POWER_CTL register
(Address 0x2D). Placing the device into standby mode preserves
the contents of FIFO.


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