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ADXL350BCEZ-RL Arkusz danych(PDF) 19 Page - Analog Devices |
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ADXL350BCEZ-RL Arkusz danych(HTML) 19 Page - Analog Devices |
19 / 36 page Data Sheet ADXL350 Rev. 0 | Page 19 of 36 I2C With CS tied high to VDDI/O, the ADXL350 is in I2C mode, requiring a simple 2-wire connection as shown in Figure 55. The ADXL350 conforms to the UM10204 I2 C-Bus Specification and User Manual, Rev. 03—19 June 2007, available from NXP Semiconductor. It supports standard (100 kHz) and fast (400 kHz) data transfer modes if the timing parameters given in Table 12 and Figure 57 are met. Single-byte or multiple-byte reads/writes are supported, as shown in Figure 56. With the SDO/ALT ADDRESS pin (Pin 7) high, the 7-bit I2C address for the device is 0x1D, followed by the R/W bit. This translates to 0x3A for a write and 0x3B for a read. An alternate I2C address of 0x53 (followed by the R/W bit) can be chosen by grounding the SDO/ALT ADDRESS pin (Pin 7). This translates to 0xA6 for a write and 0xA7 for a read. If other devices are connected to the same I2C bus, the nominal operating voltage level of these other devices cannot exceed VDDI/O by more than 0.3 V. External pull-up resistors, RP, are necessary for proper I2C operation. Refer to the UM10204 I2C-Bus Specification and User Manual, Rev. 03—19 June 2007, when selecting pull-up resistor values to ensure proper operation. Table 11. I2C Digital Input/Output Voltage Parameter Limit1 Unit Digital Input Voltage Low Level Input Voltage (V IL) 0.25 × V DD I/O V max High Level Input Voltage (V IH) 0.75 × V DD I/O V min Digital Output Voltage Low Level Output Voltage (V OL) 2 0.2 × V DD I/O V max 1 Limits are based on characterization results; not production tested. 2 The limit given is only for V DDI/O < 2 V. When VDDI/O > 2 V, the limit is 0.4 V maximum. PROCESSOR D IN/OUT D OUT RP VDD I/O RP ADXL350 CS SDA ALT ADDRESS SCL Figure 55. I2C Connection Diagram (Address 0x53) NOTES 1. THIS START IS EITHER A RESTART OR A STOP FOLLOWED BY A START. 2. THE SHADED AREAS REPRESENT WHEN THE DEVICE IS LISTENING. MASTER START SLAVE ADDRESS + WRITE REGISTER ADDRESS SLAVE ACK ACK ACK MASTER START SLAVE ADDRESS + WRITE REGISTER ADDRESS SLAVE ACK ACK ACK ACK MASTER START SLAVE ADDRESS + WRITE REGISTER ADDRESS STOP SLAVE ACK ACK MASTER START START1 START1 SLAVE ADDRESS + WRITE REGISTER ADDRESS NACK STOP SLAVE ACK ACK DATA STOP ACK SINGLE-BYTE WRITE MULTIPLE-BYTE WRITE DATA DATA MULTIPLE-BYTE READ SLAVE ADDRESS + READ SLAVE ADDRESS + READ ACK DATA DATA DATA STOP NACK ACK SINGLE-BYTE READ Figure 56. I2C Device Addressing ADXL350 |
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