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ADP3339AKCZ-2.5-R7 Arkusz danych(PDF) 9 Page - Analog Devices |
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ADP3339AKCZ-2.5-R7 Arkusz danych(HTML) 9 Page - Analog Devices |
9 / 12 page Data Sheet ADP3339 Rev. C | Page 9 of 12 THEORY OF OPERATION The ADP3339 anyCAP LDO uses a single control loop for regulation and reference functions. The output voltage is sensed by a resistive voltage divider, consisting of R1 and R2, which is varied to provide the available output voltage option. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier. A very high gain error amplifier is used to control this loop. The amplifier is constructed in such a way that equilibrium produces a large, temperature-proportional input offset voltage that is repeata- ble and very well controlled. The temperature-proportional offset voltage is combined with the complementary diode volt- age to form a virtual band gap voltage that is implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibil- ity on the trade-off of noise sources that leads to a low noise design. The R1/R2 divider is chosen in the same ratio as the band gap voltage to the output voltage. Although the R1/R2 resistor divider is loaded by Diode D1 and a second divider consisting of R3 and R4, the values can be chosen to produce a temperature- stable output. This unique arrangement specifically corrects for the loading of the divider, thus avoiding the error resulting from base current loading in conventional circuits. The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole-splitting arrangement to achieve reduced sensitivity to the value, type, and ESR of the load capacitance. Most LDOs place very strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resis- tance. Moreover, the ESR value required to keep conventional LDOs stable changes depending on load and temperature. These ESR limitations make designing with LDOs more difficult because of their unclear specifications and extreme variations over temperature. With the ADP3339 anyCAP LDO, this is no longer true. The ADP3339 can be used with virtually any good quality capacitor, with no constraint on the minimum ESR. This innovative design allows the circuit to be stable with just a small 1 μF capacitor on the output. Additional advantages of the pole- splitting scheme include superior line noise rejection and very high regulator gain, which lead to excellent line and load regulation. An impressive ±1.5% accuracy is guaranteed over line, load, and temperature. Additional features of the circuit include current limit and thermal shutdown. VIN OUT ADP3339 C1 1 μF C2 1 μF VOUT GND IN Figure 20. Typical Application Circuit PTAT VOS gm NONINVERTING WIDEBAND DRIVER INPUT Q1 ADP3339 COMPENSATION CAPACITOR ATTENUATION (VBANDGAP/VOUT) R1 D1 R2 R3 R4 OUTPUT PTAT CURRENT (a) GND CLOAD RLOAD Figure 21. Functional Block Diagram |
Podobny numer części - ADP3339AKCZ-2.5-R7 |
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Podobny opis - ADP3339AKCZ-2.5-R7 |
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