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ADuC7023BCP6Z62IRL Arkusz danych(PDF) 8 Page - Analog Devices |
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ADuC7023BCP6Z62IRL Arkusz danych(HTML) 8 Page - Analog Devices |
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8 / 96 page  ADuC7023 Data Sheet | Page 8 of 96 TIMING SPECIFICATIONS Table 2. I2C Timing in Fast Mode (400 kHz) Slave Master Parameter Description Min Max Typ Unit tL SCL low pulse width 200 1360 ns tH SCL high pulse width 100 1140 ns tSHD Start condition hold time 300 ns tDSU Data setup time 100 740 ns tDHD Data hold time 0 400 ns tRSU Setup time for repeated start 100 ns tPSU Stop condition setup time 100 800 ns tBUF Bus-free time between a stop condition and a start condition 1.3 μs tR Rise time for both SCL and SDA 300 200 ns tF Fall time for both SCL and SDA 300 ns Table 3. I2C Timing in Standard Mode (100 kHz) Slave Parameter Description Min Max Unit tL SCL low pulse width 4.7 μs tH SCL high pulse width 4.0 ns tSHD Start condition hold time 4.0 μs tDSU Data setup time 250 ns tDHD Data hold time 0 3.45 μs tRSU Setup time for repeated start 4.7 μs tPSU Stop condition setup time 4.0 μs tBUF Bus-free time between a stop condition and a start condition 4.7 μs tR Rise time for both SCL and SDA 1 μs tF Fall time for both SCL and SDA 300 ns SDA (I/O) MSB LSB ACK MSB 1 9 8 2–7 1 PS S(R) tR tF tRSU tDSU tDSU tPSU tBUF tH tF tR tDHD tDHD tSHD tSUP tL tSUP REPEATED START START CONDITION STOP CONDITION SCL (I) Figure 2. I2C-Compatible Interface Timing Rev. E |
Podobny numer części - ADuC7023BCP6Z62IRL |
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Podobny opis - ADuC7023BCP6Z62IRL |
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