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AD9887AKSZ-170 Arkusz danych(PDF) 10 Page - Analog Devices |
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AD9887AKSZ-170 Arkusz danych(HTML) 10 Page - Analog Devices |
10 / 52 page AD9887A Rev. B | Page 10 of 52 Pin Type Mnemonic Description Value Pin No. Interface 2-Wire Serial Interface SCL Serial Port Data Clock (100 kHz Maximum) 3.3 V CMOS 91 Analog/Digital A0 Serial Port Address Input 1 3.3 V CMOS 90 Analog/Digital A1 Serial Port Address Input 2 3.3 V CMOS 89 Analog/Digital Data Outputs RED B[7:0] Data Output, Red Channel, Port B/Odd, Bit 7 is the MSB 3.3 V CMOS 153 to 160 Analog/Digital GREEN B[7:0] Data Output, Green Channel, Port B/Odd 3.3 V CMOS 13 to 20 Analog/Digital BLUE B[7:0] Data Output, Blue, Port B/Odd 3.3 V CMOS 33 to 40 Analog/Digital RED A[7:0] Data Output, Red Channel, Port A/Even 3.3 V CMOS 143 to 150 Analog/Digital GREEN A[7:0] Data Output, Green Channel, Port A/Even 3.3 V CMOS 3 to 10 Analog/Digital BLUE A[7:0] Data Output, Blue Channel, Port A/Even 3.3 V CMOS 23 to 30 Analog/Digital Data Clock Outputs DATACK Data Output Clock 3.3 V CMOS 134 Analog/Digital DATACK Data Output Clock Complement 3.3 V CMOS 135 Analog/Digital Sync Detect SCDT Sync Detect Output 3.3 V CMOS 136 Analog/Digital Scan Function SCANIN Input for Scan Function 3.3 V CMOS 129 Analog/Digital SCANOUT Output for Scan Function 3.3 V CMOS 45 Analog/Digital SCANCLK Clock for Scan Function 3.3 V CMOS 50 Analog/Digital Digital Video Data Inputs Rx0+ Digital Differential Input Channel 0 True 62 Digital Rx0− Digital Differential Input Channel 0 Complement 63 Digital Rx1+ Digital Differential Input Channel 1 True 59 Digital Rx1− Digital Differential Input Channel 1 Complement 60 Digital Rx2+ Digital Differential Input Channel 2 True 56 Digital Rx2− Digital Differential Input Channel 2 Complement 57 Digital Digital Video Clock Inputs RxC+ Digital Differential Data Clock True 65 Digital RxC− Digital Differential Data Clock Complement 66 Digital Data Enable DE Data Enable 3.3 V CMOS 137 Digital Control Bit CTL0, CTL1, CTL2 Digital Control Outputs 3.3 V CMOS 46 to 48 Digital Termination Control RTERM Internal Termination Resistance Set Pin 53 Digital HDCP DDCSCL HDCP Slave Serial Port Data Clock 3.3 V CMOS 73 Digital DDCSDA HDCP Slave Serial Port Data I/O 3.3 V CMOS 72 Digital MCL HDCP Master Serial Port Data Clock 3.3 V CMOS 49 Digital MDA HDCP Master Serial Port Data I/O 3.3 V CMOS 71 Digital |
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