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ADA4891-2ARZ Arkusz danych(PDF) 5 Page - Analog Devices

Numer części ADA4891-2ARZ
Szczegółowy opis  Low Cost CMOS, High Speed, Rail-to-Rail Amplifiers
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

ADA4891-2ARZ Arkusz danych(HTML) 5 Page - Analog Devices

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ADA4891-1/ADA4891-2
Rev. A | Page 5 of 20
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
Supply Voltage
6 V
Input Voltage (Common Mode)
−VS − 0.5 V to +VS
Differential Input Voltage
±VS
Storage Temperature Range (R)
−65°C to +125°C
Operating Temperature Range (A Grade)
−40°C to +125°C
Lead Temperature (Soldering, 10 sec)
300°C
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. It can be calculated by
PD = (VS × IS) + (VS − VOUT) × VOUT/RL
(2)
where:
VS is the positive supply rail.
IS is the quiescent current.
VOUT is the output of the amplifier.
RL is the output load of the amplifier.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
To ensure proper operating, it is necessary to observe the
maximum power derating curve in Figure 5, where it is derived
by setting TJ = 150°C in Equation 1. Figure 5 shows the maximum
safe power dissipation in the package vs. the ambient temperature
for the 5-lead SOT-23 (146°C/W), the 8-lead SOIC (115°C/W),
and the 8-Lead MSOP (133°C/W) on a JEDEC standard
4-layer board.
MAXIMUM POWER DISSIPATION
0
0.5
1.0
2.0
1.5
–55
–35
–15
5
25
45
65
85
105
125
AMBIENT TEMPERAURE (°C)
The maximum power that can be safely dissipated by the
ADA4891-1/ADA4891-2 is limited by the associated rise in
junction temperature. The maximum safe junction temperature
for plastic encapsulated devices is determined by the glass
transition temperature of the plastic, approximately 150°C.
Temporarily exceeding this limit can cause a shift in parametric
performance due to a change in the stresses exerted on the die
by the package. Exceeding a junction temperature of 175°C for
an extended period can result in device failure.
TJ = 150 °C
The still-air thermal properties of the package (θJA), the ambient
temperature (TA), and the total power dissipated in the package
(PD) can be used to determine the junction temperature of the die.
The junction temperature can be calculated as
TJ = TA + (PD × θJA)
(1)
8-LEAD MSOP
8-LEAD SOIC
5-LEAD SOT-23
Figure 5. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION


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