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ADP3330ART-2.85 Arkusz danych(PDF) 9 Page - Analog Devices |
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ADP3330ART-2.85 Arkusz danych(HTML) 9 Page - Analog Devices |
9 / 12 page ADP3330 –9– REV. A Printed Circuit Board Layout Considerations All surface mount packages rely on the traces of the PC board to conduct heat away from the package. In standard packages the dominant component of the heat resistance path is the plastic between the die attach pad and the individual leads. In typical thermally enhanced packages one or more of the leads are fused to the die attach pad, significantly decreasing this component. To make the improvement mean- ingful, however, a significant copper area on the PCB must be attached to these fused pins. The patented chip-on-lead frame design of the ADP3330 uniformly minimizes the value of the dominant portion of the thermal resistance. It ensures that heat is conducted away by all pins of the package. This yields a very low 165 °C/W thermal resistance for an SOT-23-6 package, without any special board layout requirements, just relying on the normal traces con- nected to the leads. This yields a 17% improvement in heat dissipation capability as compared to a standard SOT-23-6 package. The thermal resistance can be decreased by, approxi- mately, an additional 10% by attaching a few square cm of copper area to the VIN pin of the ADP3303 package. It is not recommended to use solder mask or silkscreen on the PCB traces adjacent to the ADP3330’s pins since it will increase the junction to ambient thermal resistance of the package. Error Flag Dropout Detector The ADP3330 will maintain its output voltage over a wide range of load, input voltage and temperature conditions. If the output is about to lose regulation by reducing the supply voltage below the combined regulated output and dropout voltages, the ERR flag will be activated. The ERR output is an open collector, which will be driven low. Once set, the ERR flag’s hysteresis will keep the output low until a small margin of operating range is restored either by raising the supply voltage or reducing the load. Shutdown Mode Applying a TTL high signal to the shutdown (SD) pin, or tying it to the input pin, will turn the output ON. Pulling SD down to 0.4 V or below, or tying it to ground, will turn the output OFF. In shutdown mode, quiescent current is reduced to much less than 1 µA. Low Power, Low Dropout Applications ADP3330 is well suited for applications such as cellular phone handsets that require low quiescent current and low dropout voltage features. ADP3330 draws 34 µA typical under light load situations (i.e., load current = 100 µA), which results in low power consumption when the cell phone is in standby mode. Figure 23 shows an application in which the ADP3330 is used in a handset to provide 2.75 V nominal output voltage. The cell phone is powered from 3 cell NiCd or 1 cell Li-Ion battery. ADP3330 guarantees an accuracy of 1.4%, even when the input/ output differential is merely 250 mV (worst case). This implies that the output is regulated and within specification even when the battery voltage has reached its end-of-discharge voltage of 3 V. The output voltage never falls below 2.7 V, even under worst case load and temperature conditions. The low dropout feature coupled with the high accuracy of the ADP3330 ensures that the system is reliably powered until the end of the life of the battery, which results in increased system talk time. MINIMUM BATTERY VOLTAGE 3.0V NOMINAL OUTPUT VOLTAGE 2.75V 2.712V ABSOLUTE MINIMUM OUTPUT VOLTAGE 2.700V END OF DISCHARGE VOLTAGE OF 3 CELL NiCd OR 1 CELL Li-Ion BATTERY 250mV MAXIMUM INPUT-OUTPUT OVERHEAD FOR 200mA OUTPUT CURRENT –1.4% OUTPUT VOLTAGE ACCURACY 12mV TRANSIENT, LINE AND LOAD RESPECTIVE MARGIN Figure 23. LDO Budgeting for a 3 Cell NiCd/1 Cell Li-Ion Supply |
Podobny numer części - ADP3330ART-2.85 |
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Podobny opis - ADP3330ART-2.85 |
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