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TC74VHC595FT Arkusz danych(PDF) 2 Page - Toshiba Semiconductor |
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TC74VHC595FT Arkusz danych(HTML) 2 Page - Toshiba Semiconductor |
2 / 12 page TC74VHC595F/FT/FK 2012-02-29 2 Pin Assignment IEC Logic Symbol Truth Table Inputs SI SCK SCLR RCK G Function X X X X H QA thru QH outputs disable X X X X L QA thru QH outputs enable X X L X X Shift register is cleared. L H X X First stage of S.R. becomes “L”. Other stages store the data of previous stage, respectively. H H X X First stage of S.R. becomes “H”. Other stages store the data of previous stage, respectively. X H X X State of S.R. is not changed. X X X X S.R. data is stored into storage register. X X X X Storage register stage is not changed. X: Don’t care VCC 12 G RCK SCK 11 10 9 16 1 2 3 4 5 6 7 QG QH GND QC SCLR 8 SI 15 QH’ QA QE QF 14 QD 13 (top view) QB 2D 3 (11) (10) (14) 1D (15) (2) (4) QB QD QF (1) (3) (5) QC QE QG R C/1 SCK (6) QH (7) QA SI SCLR (12) (13) EN3 C2 RCK G SRG8 QH’ (9) 2D 3 |
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