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AD8321AR Arkusz danych(PDF) 8 Page - Analog Devices |
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AD8321AR Arkusz danych(HTML) 8 Page - Analog Devices |
8 / 20 page AD8321 The attenuation setting in the AD8321 is determined by the 8-bit word in the data latch. The SDATA load sequence is initiated by a falling edge on DATEN. The gain control data (SDATA) is serially loaded (MSB first) into the 7-bit shift register at each rising edge of the clock. See Figure 24. While DATEN is low, the data latch holds the previous data word allowing the attenuation level to remain unchanged. After eight clock cycles the new data word is fully loaded and DATEN is switched high. This enables the data latch and the loaded register data is passed to the attenuator with the updated gain value. Also at this DATEN transition, the internal clock is disabled, thus inhibiting new serial input data. The power amplifier has two basic modes of operation. A for ward mode (or power-up mode) and a reverse mode (or power- down) mode. In the power-up mode ( PD = 1), the power amplifier stage is enabled and the AD8321 has a maximum gain of 20 V/V or 26 dB (into 75 W). With a total attenuation of 53.43 dB in the DAC, vernier and preamp, the AD8321’s total gain range is 26 dB to –27.43 dB. In both the forward or reverse mode the single-ended output signal maintains a dc level of VCC/2. This dc output level provides for optimum large signal linearity. In the power-down mode ( PD = 0), the power amplifier is turned off and a “reverse” amplifier (the inner triangle in Figure 22) is enabled. During this 1-to-0 transition, the output power is disabled. This assures that S11 and S22 remain approximately equal to zero thus minimizing line reflections. In the time domain, as PD switches states, a transitional glitch and pedestal offset results (See Figures 14 and 15). These anomalies have been minimized by temperature compensated internal circuitry and laser trimming. The powered down supply current drops to 52 mA versus 90 mA in the power-up mode. SDATA CLK DATEN PD ANALOG OUTPUT TES VALID DATA WORD G1 MSB. . . .LSB GAIN TRANSFER (G1) TDS TEH 8 CLOCK CYCLES GAIN TRANSFER (G2) VALID DATA WORD G2 TOFF TGS SIGNAL AMPLITUDE (p-p) PEDESTAL TC TWH Figure 24. Serial Interface Timing APPLICATIONS General Application The AD8321 is primarily intended for use as the return path (also called upstream path) Power Amplifier (PA) or line driver in cable modem applications. Upstream data is modulated in either QPSK or QAM format. This is done either in DSP or by a dedicated QPSK/QAM modulator such as the AD9853 or other modem/modulator chip. The amplifier receives its input signal either from the dedicated QPSK/QAM modulator or from a DAC. In both cases, the signal must be low-pass filtered before being applied to the line driving amplifier. Because the distance to the central office varies from cable modem sub scriber to subscriber, resulting in various line losses, signals from various subscribers will require attenuation while others may require gain. As a result, the AD8321 line driver is required to vary its output applying attenuation or gain as needed so that all signals arriving at the central office are of the same amplitude. DOCSIS (Data Over Cable Service Interface Specifications) requires a cable modem output signal ranging in power from a minimum of 8 dBmV to a maximum of 58 dBmV. In cable modem applications where DOCSIS compliance is desired, the AD8321 amplifier must be used in conjunction with a 75 W matching attenuator connected between the AD8321 output and the low-pass input port of the diplexer. See the schematic in Figure 28. The matching attenuator is used to achieve DOCSIS- compliant noise levels at the lower end of the AD8321 output power range. The insertion loss of a diplexer is typically less than 1 dB. As a result of these combined losses, the PA line driver must be capable of delivering sufficient power into a 75 W load while maintaining reasonable distortion performance at the output of the modem. (See sections containing “DOCSIS” for further information. All references to DOCSIS pertain to SP-RFI-I04-980724 entitled Radio Frequency Interface Specification.) TON –8– REV. A |
Podobny numer części - AD8321AR |
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Podobny opis - AD8321AR |
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