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ADS1192IPBSR Arkusz danych(PDF) 10 Page - Texas Instruments |
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ADS1192IPBSR Arkusz danych(HTML) 10 Page - Texas Instruments |
10 / 67 page ADS1191 ADS1192 SBAS566A – DECEMBER 2011 – REVISED SEPTEMBER 2012 www.ti.com PIN ASSIGNMENTS NAME TERMINAL FUNCTION DESCRIPTION AVDD 12 Supply Analog supply AVSS 13 Supply Analog ground CS 18 Digital input Chip select CLK 17 Digital input Master clock input CLKSEL 14 Digital input Master clock select DGND 24 Supply Digital ground DIN 19 Digital input SPI data in DOUT 21 Digital output SPI data out DRDY 22 Digital output Data ready; active low DVDD 23 Supply Digital power supply GPIO1/RCLK1 26 Digital input/output GPIO1 GPIO2/RCLK2 25 Digital input/output GPIO2 IN1N(1) 3 Analog input Differential analog negative input 1 IN1P(1) 4 Analog input Differential analog positive input 1 IN2N(1) 5 Analog input Differential analog negative input 2 IN2P(1) 6 Analog input Differential analog positive input 2 PGA1N 1 Analog output Differential analog negative output 1 PGA1P 2 Analog output Differential analog positive output 1 PGA2N 7 Analog output Differential analog negative output 2 PGA2P 8 Analog output Differential analog positive output 2 PWDN/RESET 15 Digital input Power-down/System reset; active low RLDIN/RLDREF 29 Analog input Right leg drive input to MUX/RLD reference RLDINV 28 Analog input Right leg drive inverting input RLDOUT 30 Analog input Right leg drive output IN3N(1) 32 Analog input/output Differential analog negative input 3 IN3P(1) 31 Analog input/output Differential analog positive input 3 SCLK 20 Digital input SPI clock START 16 Digital input Start conversion VCAP1 11 — Analog bypass capacitor VCAP2 27 — Analog bypass capacitor VREFN 10 Analog input Negative reference voltage VREFP 9 Analog input/output Positive reference voltage (1) Excludes effects of noise, linearity, offset, and gain error. 10 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Links: ADS1191 ADS1192 |
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