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UC284XBDR2G Arkusz danych(PDF) 8 Page - ON Semiconductor |
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UC284XBDR2G Arkusz danych(HTML) 8 Page - ON Semiconductor |
8 / 19 page UC3844B, UC3845B, UC2844B, UC2845B http://onsemi.com 8 Figure 16. Representative Block Diagram Figure 17. Timing Diagram Capacitor CT Latch “Set" Input Output/ Compensation Current Sense Input Latch “Reset" Input Output Large RT/Small CT Small RT/Large CT + - Reference Regulator VCC UVLO + - Vref UVLO 3.6V 36V S R Q Internal Bias + 1.0mA Oscillator 2.5V R R R 2R Error Amplifier Voltage Feedback Input Output/ Compensation Current Sense Comparator 1.0V VCC 7(12) GND 5(9) VC 7(11) Output 6(10) Power Ground 5(8) Current Sense Input 3(5) RS Q1 VCC Vin 1(1) 2(3) 4(7) 8(14) RT CT Vref = Sink Only Positive True Logic Pin numbers adjacent to terminals are for the 8-pin dual-in-line package. Pin numbers in parenthesis are for the D suffix SOIC-14 package. PWM Latch (See Text) T |
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