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AD9874ABST Arkusz danych(PDF) 4 Page - Analog Devices |
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AD9874ABST Arkusz danych(HTML) 4 Page - Analog Devices |
4 / 40 page REV. A AD9874 –4– DIGITAL SPECIFICATIONS (VDDI = VDDF = VDDA = VDDC = VDDL = VDDD = VDDH = 2.7 V to 3.6 V, VDDQ = VDDP = 2.7 V to 5.5 V, fCLK = 18 MSPS, fIF = 109.65 MHz, fLO = 107.4 MHz, fREF = 16.8 MHz, unless otherwise noted.) 1 Parameter Temp Test Level Min Typ Max Unit DECIMATOR Decimation Factor 2 Full IV 48 960 Pass-Band Width Full V 50% fCLKOUT Pass-Band Gain Variation Full IV 1.2 dB Alias Attenuation Full IV 88 dB SPI-READ OPERATION (See Figure 1a) PC Clock Frequency Full IV 10 MHz PC Clock Period (tCLK) Full IV 100 ns PC Clock HI (tHI) Full IV 45 ns PC Clock LOW (tLOW) Full IV 45 ns PC to PD Setup Time (tDS) Full IV 2 ns PC to PD Hold Time (tDH) Full IV 2 ns PE to PC Setup Time (t S) Full IV 5 ns PC to PE Hold Time (t H) Full IV 5 ns SPI-WRITE OPERATION 3 (See Figure 1b) PC Clock Frequency Full IV 10 MHz PC Clock Period (tCLK) Full IV 100 ns PC Clock HI (tHI) Full IV 45 ns PC Clock LOW (tLOW) Full IV 45 ns PC to PD Setup Time (tDS) Full IV 2 ns PC to PD Hold Time (tDH) Full IV 2 ns PC to PD (or DOUBT) Data Valid Time (tDV) Full IV 3 ns PE to PD Output Valid to Hi-Z (t EZ) Full IV 8 ns SSI 3 (see Figure 2b) CLKOUT Frequency Full IV 0.867 26 MHz CLKOUT Period (tCLK) Full IV 38.4 1153 ns CLKOUT Duty Cycle (tHI, tLOW) Full IV 33 50 67 ns CLKOUT to FS Valid Time (tV) Full IV –1 +1 ns CLKOUT to DOUT Data Valid Time (tDV) Full IV –1 +1 ns CMOS LOGIC INPUTS 4 Logic “1” Voltage (VIH) Full IV VDDH – 0.2 V Logic “0” Voltage (VIL) Full IV 0.5 V Logic “1” Current (VIH) Full IV 10 µA Logic “0” Current (VIL) Full IV 10 µA Input Capacitance Full IV 3 pF CMOS LOGIC OUTPUTS 3, 4, 5 Logic “1” Voltage (VIH) Full IV VDDH – 0.2 V Logic “0” Voltage (VIL) Full IV 0.2 V NOTES 1Standard operating mode: high IIP3 setting, synthesizers in normal (not fast acquire) mode, f CLK = 18 MHz, decimation factor = 300, 10 pF load on SSI output pins: VDDx = 3.0 V. 2Programmable in steps of 48 or 60. 3CMOS output mode with C LOAD = 10 pF and Drive Strength = 7. 4Absolute Max and Min input/output levels are VDDH +0.3 V and –0.3 V. 5I OL = 1 mA; specification is also dependent on Drive Strength setting. Specifications subject to change without notice. |
Podobny numer części - AD9874ABST |
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Podobny opis - AD9874ABST |
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