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AMC004CFLKA Arkusz danych(PDF) 7 Page - Advanced Micro Devices |
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AMC004CFLKA Arkusz danych(HTML) 7 Page - Advanced Micro Devices |
7 / 42 page 5/4/98 AmC0XXCFLKA 7 Table 2. Attribute Memory Bus Operations Legend: X = Don’t Care, where Don’t Care is either VIL or VIH levels. See DC Characteristics for voltage levels of normal TTL or CMOS input levels. Notes: 1. VPP pins are not connected in the 5.0 V-Only Flash Memory Card. 2. In this x8 mode, A0 = VIL outputs or inputs the “even” byte (low byte) of the x16 word on D0–D7. 3. Only even-byte data is valid during Attribute Memory Read function. 4. During Attribute Memory Read function, REG and OE must be active for the entire cycle. 5. During Attribute Memory Write function, REG and WE must be active for the entire cycle, OE must be inactive for the entire cycle. 6. Standby current is ICCS. Pins/Operation REG CE2CE1OE WE A0 D8–D15 D0–D7 READ-ONLY Read (x8) (Notes 2, 4) VIL VIH VIL VIL VIH VIL High-Z Data Out-Even Read (x8) (Notes 3, 4) VIL VIH VIL VIL VIH VIH High-Z Not Valid Read (x8) (Note 3) VIL VIL VIH VIL VIH X Not Valid High-Z Read (x16) (Notes 3, 4, 5) VIL VIL VIL VIL VIH X Not Valid Data Out-Even Output Disable VIL XX VIH VIH X High-Z High-Z Standby (Note 6) X VIH VIH X X X High-Z High-Z READ/WRITE Read (x8) (Notes 2, 4) VIL VIH VIL VIL VIH VIL High-Z Data Out-Even Read (x8) (Notes 3, 4) VIL VIH VIL VIL VIH VIH High-Z Not Valid Read (x8) (Note 4) VIL VIL VIH VIL VIH X Not Valid High-Z Read (x16) (Note 4) VIL VIL VIL VIL VIH X Not Valid Data Out-Even Write (x8) (Notes 2, 5) VIL VIH VIL VIH VIL VIL High-Z Data In-Even Write (x8) (Note 5) VIL VIH VIL VIH VIL VIH High-Z High-Z Write (x8) (Notes 4, 5) VIL VIL VIH VIH VIL X High-Z High-Z Write (x16) (Note 5) VIL VIL VIL VIH VIL X High-Z Data In-Even Output Disable VIL XX VIH VIL X High-Z High-Z Standby (Note 6) X VIH VIH X X X High-Z High-Z Volt-only? |
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