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SM72295 Arkusz danych(PDF) 9 Page - Texas Instruments |
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SM72295 Arkusz danych(HTML) 9 Page - Texas Instruments |
9 / 17 page 0.1 1.0 10.0 100.0 1000.0 SWITCHING FREQUENCY (kHz) 0.001 0.010 0.100 1.000 CL = 4400 pF CL = 0 pF CL = 1000 pF LI HI tHPLH tLPLH tHPHL tLPHL LO HO LI HI tMOFF tMON LO HO SM72295 www.ti.com SNVS688E – OCTOBER 2010 – REVISED APRIL 2013 Timing Diagram Power Dissipation Considerations The total IC power dissipation is the sum of the gate driver losses and the bootstrap diode losses. The gate driver losses are related to the switching frequency (f), output load capacitance on LO and HO (CL), and supply voltage (VDD) and can be roughly calculated as: PDGATES = 2 • f • CL • VDD 2 (1) There are some additional losses in the gate drivers due to the internal CMOS stages used to buffer the LO and HO outputs. The following plot shows the measured gate driver power dissipation versus frequency and load capacitance. At higher frequencies and load capacitance values, the power dissipation is dominated by the power losses driving the output loads and agrees well with the above equation. This plot can be used to approximate the power losses due to the gate drivers. Figure 13. Gate Driver Power Dissipation (LO + HO) VCC = 12V, Neglecting Diode Losses The bootstrap diode power loss is the sum of the forward bias power loss that occurs while charging the bootstrap capacitor and the reverse bias power loss that occurs during reverse recovery. Since each of these events happens once per cycle, the diode power loss is proportional to frequency. Larger capacitive loads require more current to recharge the bootstrap capacitor resulting in more losses. Higher input voltages (VIN) to the half bridge result in higher reverse recovery losses. The following plot was generated based on calculations and lab measurements of the diode recovery time and current under several operating conditions. This can be useful for approximating the diode power dissipation. The total IC power dissipation can be estimated from the previous plots by summing the gate drive losses with the bootstrap diode losses for the intended application. Copyright © 2010–2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: SM72295 |
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