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Zakładka z wyszukiwarką danych komponentów |
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ADS1243IPWRG4 Arkusz danych(PDF) 3 Page - Texas Instruments |
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ADS1243IPWRG4 Arkusz danych(HTML) 3 Page - Texas Instruments |
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3 / 32 page  ADS1242, 1243 3 SBAS235H www.ti.com ELECTRICAL CHARACTERISTICS: VDD = 5V All specifications TMIN to TMAX, VDD = +5V, fMOD = 19.2kHz, PGA = 1, Buffer ON, fDATA = 15Hz, VREF ≡ (REF IN+) – (REF IN–) = +2.5V, unless otherwise specified. ADS1242 ADS1243 PARAMETER CONDITIONS MIN TYP MAX UNITS ANALOG INPUT (AIN0 – AIN7) Analog Input Range Buffer OFF GND – 0.1 VDD + 0.1 V Buffer ON GND + 0.05 VDD – 1.5 V Full-Scale Input Range (In+) – (In–), See Block Diagram, RANGE = 0 ±V REF /PGA V RANGE = 1 ±V REF /(2 • PGA) V Differential Input Impedance Buffer OFF 5/PGA M Ω Buffer ON 5 G Ω Bandwidth fDATA = 3.75Hz –3dB 1.65 Hz fDATA = 7.50Hz –3dB 3.44 Hz fDATA = 15.00Hz –3dB 14.6 Hz Programmable Gain Amplifier User-Selectable Gain Ranges 1 128 Input Capacitance 9pF Input Leakage Current Modulator OFF, T = 25 °C5 pA Burnout Current Sources 2 µA OFFSET DAC Offset DAC Range RANGE = 0 ±V REF /(2 • PGA) V RANGE = 1 ±V REF /(4 • PGA) V Offset DAC Monotonicity 8 Bits Offset DAC Gain Error ±10 % Offset DAC Gain Error Drift 1 ppm/ °C SYSTEM PERFORMANCE Resolution No Missing Codes 24 Bits Integral Nonlinearity End Point Fit ±0.0015 % of FS Offset Error (1) 7.5 ppm of FS Offset Drift(1) 0.02 ppm of FS/ °C Gain Error (1) 0.005 % Gain Error Drift(1) 0.5 ppm/ °C Common-Mode Rejection at DC 100 dB fCM = 60Hz, fDATA = 15Hz 130 dB fCM = 50Hz, fDATA = 15Hz 120 dB Normal-Mode Rejection fSIG = 50Hz, fDATA = 15Hz 100 dB fSIG = 60Hz, fDATA = 15Hz 100 dB Output Noise See Typical Characteristics Power-Supply Rejection at DC, dB = –20 log( ∆V OUT /VDD) (2) 80 95 dB VOLTAGE REFERENCE INPUT Reference Input Range REF IN+, REF IN– 0VDD V VREF VREF ≡ (REF IN+) – (REF IN–), RANGE = 0 0.1 2.5 2.6 V RANGE = 1 0.1 VDD V Common-Mode Rejection at DC 120 dB Common-Mode Rejection fVREFCM = 60Hz, fDATA = 15Hz 120 dB Bias Current(3) VREF = 2.5V 1.3 µA POWER-SUPPLY REQUIREMENTS Power-Supply Voltage VDD 4.75 5.25 V Current PGA = 1, Buffer OFF 240 375 µA PGA = 128, Buffer OFF 450 800 µA PGA = 1, Buffer ON 290 425 µA PGA = 128, Buffer ON 960 1400 µA SLEEP Mode 60 µA Read Data Continuous Mode 230 µA PDWN 0.5 nA Power Dissipation PGA = 1, Buffer OFF 1.2 1.9 mW TEMPERATURE RANGE Operating –40 +85 °C Storage –60 +100 °C NOTES: (1) Calibration can minimize these errors. (2) ∆V OUT is a change in digital result. (3) 12pF switched capacitor at fSAMP clock frequency. |
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