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ADS5500 Arkusz danych(PDF) 11 Page - Texas Instruments

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Numer części ADS5500
Szczegółowy opis  12-Bit, 80 MSPS Analog-To-Digital Converter
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Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
Logo TI1 - Texas Instruments

ADS5500 Arkusz danych(HTML) 11 Page - Texas Instruments

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DEFINITION OF SPECIFICATIONS
SNR + 10Log10
P
S
P
N
(1)
SINAD + 10Log10
P
S
P
N
) PD
(2)
ENOB +
SINAD * 1.76
6.02
(3)
THD + 10Log10
P
S
P
D
(4)
ADS5522
SBAS320C – MAY 2004 – REVISED FEBRUARY 2007
Offset Error
Analog Bandwidth
The offset error is the difference, given in number of
The analog input frequency at which the power of the
LSBs, between the ADC's actual average idle
fundamental is reduced by 3 dB with respect to the
channel output code and the ideal average idle
low frequency value.
channel output code. This quantity is often mapped
into mV.
Aperture Delay
Temperature Drift
The delay in time between the falling edge of the
input sampling clock and the actual time at which the
The temperature drift coefficient (with respect to gain
sampling occurs.
error and offset error) specifies the change per
degree Celsius of the parameter from TMIN to TMAX. It
Aperture Uncertainty (Jitter)
is calculated by dividing the maximum deviation of
The sample-to-sample variation in aperture delay.
the parameter across the TMIN to TMAX range by the
difference (TMAX – TMIN).
Clock Pulse Width/Duty Cycle
Signal-to-Noise Ratio (SNR)
The duty cycle of a clock signal is the ratio of the
time the clock signal remains at a logic high (clock
SNR is the ratio of the power of the fundamental (PS)
pulse width) to the period of the clock signal. Duty
to the noise floor power (PN), excluding the power at
cycle is typically expressed as a percentage. A
DC and the first eight harmonics.
perfect differential sine wave clock results in a 50%
duty cycle.
Maximum Conversion Rate
SNR is either given in units of dBc (dB to carrier)
The maximum sampling rate at which certified
when the absolute power of the fundamental is used
operation is given. All parametric testing is performed
as the reference, or dBFS (dB to full scale) when the
at this sampling rate unless otherwise noted.
power of the fundamental is extrapolated to the
converter's full-scale range.
Minimum Conversion Rate
Signal-to-Noise and Distortion (SINAD)
The minimum sampling rate at which the ADC
functions.
SINAD is the ratio of the power of the fundamental
(PS) to the power of all the other spectral
Differential Nonlinearity (DNL)
components including noise (PN) and distortion (PD),
An ideal ADC exhibits code transitions at analog
but excluding dc.
input values spaced exactly 1 LSB apart. The DNL is
the deviation of any single step from this ideal value,
measured in units of LSBs.
Integral Nonlinearity (INL)
SINAD is either given in units of dBc (dB to carrier)
when the absolute power of the fundamental is used
The INL is the deviation of the ADC's transfer
as the reference, or dBFS (dB to full scale) when the
function from a best fit line determined by a least
power of the fundamental is extrapolated to the
squares curve fit of that transfer function, measured
converter's full-scale range.
in units of LSBs.
Effective Number of Bits (ENOB)
Gain Error
The
ENOB
is
a
measure
of
a
converter's
The gain error is the deviation of the ADC's actual
performance as compared to the theoretical limit
input full-scale range from its ideal value. The gain
based on quantization noise.
error is given as a percentage of the ideal input
full-scale range. Gain error does not account for
variations in the internal reference voltages (see the
Electrical Specifications section for limits on the
Total Harmonic Distortion (THD)
variation of V(REFP) and V(REFM)).
THD is the ratio of the power of the fundamental (PS)
to the power of the first eight harmonics (PD).
THD is typically given in units of dBc (dB to carrier).
11
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