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LM3526M-L Arkusz danych(PDF) 9 Page - Texas Instruments

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Numer części LM3526M-L
Szczegółowy opis  LM3526 Dual Port USB Power Switch and Over-Current Protection
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Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
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LM3526M-L Arkusz danych(HTML) 9 Page - Texas Instruments

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LM3526
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SNVS054E – FEBRUARY 2000 – REVISED MARCH 2013
A 0.01 µF ceramic capacitor is recommended on each port directly between the Vbus and ground pins to prevent
EMI damage to other components during the hot-detachment.
Adequate capacitance must be connected to the input of the device to limit the input voltage drop during a hot-
plug event to less than 330 mV. For a few tens of µs, the host must supply the in-rush current to the peripheral,
charging its bulk capacitance to Vbus. This current is initially supplied by the input capacitor. A 33 µF 16V
tantalum capacitor is recommended.
In choosing the capacitors, special attention must be paid to the Effective Series Resistance, ESR, of the
capacitors to minimize the IR drop across the capacitor's ESR.
SOFT START
To eliminate the upstream voltage droop caused by the high in-rush current drawn by the output capacitors, the
maximum in-rush current is internally limited to 1.5A.
TRANSIENT OVER-CURRENT DELAY
High transient current is also generated when the switch is enabled and large values of capacitance at the output
have to be rapidly charged. The in-rush currents created could exceed the short circuit current limit threshold of
the device forcing it into the current limit mode. The capacitor is charged with the maximum available short circuit
current set by the LM3526. The duration of the in-rush current depends on the size of the output capacitance and
load current. Since this is not a valid fault condition, the LM3526 delays the generation of the fault flag for 1 ms.
If the condition persists due to other causes such as a short, a fault flag is generated after a 1 ms delay has
elapsed.
The LM3526's 1 ms delay in issuing the fault flag is adequate for most applications. If longer delays are required,
an RC filter as shown in Figure 21 may be used.
Figure 21.
PCB LAYOUT CONSIDERATIONS
In order to meet the USB requirements for voltage drop, droop and EMI, each component used in this circuit
must be evaluated for its contribution to the circuit performance. The PCB layout rules and guidelines must be
followed.
Place the switch as close to the USB connector as possible. Keep all Vbus traces as short as possible and use
at least 50-mil, 1 ounce copper for all Vbus traces. Solder plating the traces will reduce the trace resistance.
Avoid vias as much as possible. If vias are used, use multiple vias in parallel and/or make them as large as
possible.
Place the output capacitor and ferrite beads as close to the USB connector as possible.
If ferrite beads are used, use wires with minimum resistance and large solder pads to minimize connection
resistance.
Copyright © 2000–2013, Texas Instruments Incorporated
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