Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

AD9860BST Arkusz danych(PDF) 4 Page - Analog Devices

Numer części AD9860BST
Szczegółowy opis  Mixed-Signal Front-End Processor for Broadband Communications
Download  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD9860BST Arkusz danych(HTML) 4 Page - Analog Devices

  AD9860BST Datasheet HTML 1Page - Analog Devices AD9860BST Datasheet HTML 2Page - Analog Devices AD9860BST Datasheet HTML 3Page - Analog Devices AD9860BST Datasheet HTML 4Page - Analog Devices AD9860BST Datasheet HTML 5Page - Analog Devices AD9860BST Datasheet HTML 6Page - Analog Devices AD9860BST Datasheet HTML 7Page - Analog Devices AD9860BST Datasheet HTML 8Page - Analog Devices AD9860BST Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 32 page
background image
REV. 0
–4–
AD9860/AD9862
Test
AD9860/AD9862
(20 pF Load)
Temp
Level
Min
Typ
Max
Unit
Minimum Reset Pulsewidth Low (tRL)NA
NA
5
Clock Cycles
Digital Output Rise/Fall Time
25ºC
III
2.8
4
ns
DLL Output Clock
25ºC
III
32
128
MHz
DLL Output Duty Cycle
25ºC
III
50
%
Tx–/Rx–Interface (See Figures 11 and 12)
TxSYNC/TxIQ Setup Time (tTx1, tTx3)25ºC
III
3
ns
TxSYNC/TxIQ Hold Time (tTx2, tTx4)25ºC
III
3
ns
RxSYNC/RxIQ/IF to Valid Time(tRx1, tRx3)25ºC
III
5.2
ns
RxSYNC/RxIQ/IF Hold Time (tRx2, tRx4)25ºC
III
0.2
ns
Serial Control Bus (See Figures 1 and 2)
Maximum SCLK Frequency (fSCLK)
Full
III
16
MHz
Minimum Clock Pulsewidth High (tHI)
Full
III
30
ns
Minimum Clock Pulsewidth Low (tLOW)
Full
III
30
ns
Maximum Clock Rise/Fall Time
Full
III
1
ms
Minimum Data/SEN Setup Time (tS)
Full
III
25
ns
Minimum SEN/Data Hold Time (tH)
Full
III
0
ns
Minimum Data/SCLK Setup Time (tDS)
Full
III
25
ns
Minimum Data Hold Time (tDH)
Full
III
0
ns
Output Data Valid/SCLK Time (tDV)
Full
III
30
ns
AUXILARY ADC
Conversion Rate
25ºC
III
1.25
MHz
Input Range
25ºC
III
3
V
Resolution
25ºC
III
10
Bits
AUXILARY DAC
Settling Time
25ºC
III
8
ms
Output Range
25ºC
III
3
V
Resolution
25ºC
III
8
Bits
ADC TIMING
Latency (All Digital Processing Blocks Disabled)
25ºC
III
7
Cycles
DAC Timing
Latency (All Digital Processing Blocks Disabled)
25ºC
III
3
Cycles
Latency (2
Interpolation Enabled)
25ºC
III
30
Cycles
Latency (4
Interpolation Enabled)
25ºC
III
72
Cycles
Additional Latency (Hilbert Filter Enabled)
25ºC
III
36
Cycles
Additional Latency (Coarse Modulation Enabled)
25ºC
III
5
Cycles
Additional Latency (Fine Modulation Enabled)
25ºC
III
8
Cycles
Output Settling Time (TST) (to 0.1%)
25ºC
III
35
ns
Specifications subject to change without notice.
TIMING CHARACTERISTICS
Test
AD9860/AD9862
PARAMETERS (continued)
Temp
Level
Min
Typ
Max
Unit
POWER SUPPLY (continued)
Rx Path (fADC = 64 MSPS)
Processing Blocks Disabled
25ºC
III
9
mA
Decimation Filter Enabled
25ºC
III
15
mA
Hilbert Filter Enabled
25ºC
III
16
mA
Hilbert and Decimation Filter Enabled
25ºC
III
18.5
mA
NOTES
1% f
DATA refers to the input data rate of the digital block.
2Interpolation filter stop band is defined by image suppression of 50 dB or greater.
Specifications subject to change without notice.


Podobny numer części - AD9860BST

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD9860BST AD-AD9860BST Datasheet
617Kb / 32P
   Mixed-Signal Front-End (MxFE?? Processor for Broadband Communications
REV. 0
AD9860BST AD-AD9860BST Datasheet
386Kb / 32P
   Mixed-Signal Front-End (MxFE) Processor
REV. 0
AD9860BSTZ AD-AD9860BSTZ Datasheet
386Kb / 32P
   Mixed-Signal Front-End (MxFE) Processor
REV. 0
More results

Podobny opis - AD9860BST

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD9860 AD-AD9860_15 Datasheet
386Kb / 32P
   Mixed-Signal Front-End Processor for Broadband Communications
REV. 0
AD9862 AD-AD9862_15 Datasheet
386Kb / 32P
   Mixed-Signal Front-End Processor for Broadband Communications
REV. 0
AD9860 AD-AD9860 Datasheet
617Kb / 32P
   Mixed-Signal Front-End (MxFE?? Processor for Broadband Communications
REV. 0
AD9862BSTZ AD-AD9862BSTZ Datasheet
386Kb / 32P
   Mixed-Signal Front-End (MxFE?? Processor for Broadband Communications
REV. 0
AD9878 AD-AD9878 Datasheet
749Kb / 36P
   Mixed-Signal Front End for Broadband Applications
REV. A
AD9878 AD-AD9878_15 Datasheet
755Kb / 36P
   Mixed-Signal Front End for Broadband Applications
REV. A
AD9865 AD-AD9865 Datasheet
1Mb / 48P
   Broadband Modem Mixed-Signal Front End
REV. A
AD9975 AD-AD9975_15 Datasheet
1Mb / 20P
   Broadband Modem Mixed-Signal Front End
REV. 0
AD9865 AD-AD9865_15 Datasheet
1Mb / 48P
   Broadband Modem Mixed-Signal Front End
REV. A
AD9866 AD-AD9866_15 Datasheet
1Mb / 48P
   Broadband Modem Mixed-Signal Front End
REV. B
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com