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ADS7870EA Arkusz danych(PDF) 8 Page - Burr-Brown (TI) |
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ADS7870EA Arkusz danych(HTML) 8 Page - Burr-Brown (TI) |
8 / 27 page 8 ® ADS7870 OVERVIEW The ADS7870 is a complete data acquisition device com- posed of an input analog multiplexer (MUX), a program- mable gain amplifier (PGA) and an analog-to-digital con- verter (A/D). Four lines of digital input/output (I/O) are also provided. Additional circuitry provides support functions including conversion clock, voltage reference, and serial interface for control and data retrieval. Control and configuration of the ADS7870 is accomplished by command bytes written to internal registers through the serial port. Command register device control includes MUX channel selection, PGA gain, A/D start conversion com- mand, and I/O line control. Command register configuration control includes internal voltage reference setting and oscil- lator control. Operational modes and selected functions can be activated by digital inputs at corresponding pins. Pin settable configu- ration options include SCLK active-edge selection, master reset, and internal oscillator clock enable. The ADS7870 has eight analog-signal input pins, LN0 through LN7. These pins are connected to a network of analog switches (the “MUX” block in Figure 1). The inputs can be configured as 8 single ended or 4 differential inputs. The four general-purpose digital I/O pins (I/O3 through I/O0) can be made to function individually as either digital inputs or digital outputs. These pins give the user access to four digital I/O pins through the serial interface without having to run additional wires to the host controller. The programmable gain amplifier (PGA) provides gains of 1, 2, 4, 5, 8, 10, 16, and 20V/V. The 12-bit A/D converter in the ADS7870 is a successive approximation type. The output of the converter is 2’s complement format and can be read MSB first or LSB first. The ADS7870’s internal voltage reference can be software configured for output voltages of 1.15V, 2.048V or 2.5V. The reference circuit is trimmed for high initial accuracy and low temperature drift. A separate buffer amplifier is pro- vided to buffer the high impednace VREF output. The voltage reference, PGA, and A/D converter use the conversion clock (CCLK) and signals derived from it. CCLK can be either an input or output signal. The ADS7870 can divide the CCLK signal by a constant before it is applied to the A/D converter or PGA. This allows a higher frequency system clock to be used to control the A/D converter operation. Division factors (DF) of 1, 2, 4 and 8 are avail- able. The signal that is actually applied to the PGA and A/D converter is DCLK, where DCLK = CCLK/DF. The ADS7870 is designed so that its serial interface can be conveniently used with a wide variety of micro-controllers. It has four conventional serial interface pins: SCLK (serial data clock), DOUT (serial data out), DIN (serial data in, which may be set bi-directional in some applications), and CS (chip select function). The ADS7870 has ten internal user accessible registers which are used in normal operation to configure and control the device (see Table II, Register Address Map). REF Serial Interface ADS7870 DIN SCLK CS CONVERT RESET RISE/FALL BUSY DOUT Clock Divider Oscillator OSC ENABLE CCLK BUF OUT/REFIN BUF IN V REF 28 27 26 12-Bit A/D BUF MUX 1 2 3 4 5 6 7 8 19 18 17 16 9 10 23 20 21 22 LN0 LN1 LN2 LN3 LN4 LN5 LN6 LN7 11 12 13 14 Digital I/O Registers and Control I/O 0 I/O 1 I/O 2 I/O 3 V DD 24 PGA Gnd 25 FIGURE 1. Basic Circuit Diagram. |
Podobny numer części - ADS7870EA |
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Podobny opis - ADS7870EA |
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