AD9708

–8–

REV. B

50pF

COMP1

+1.2V REF

AVDD

REFLO

CURRENT

SOURCE

ARRAY

0.1 F

+5V

REFIO

FS ADJ

2k

0.1 F

AD9708

ADDITIONAL

LOAD

OPTIONAL

EXTERNAL

REF BUFFER

Figure 13. Internal Reference Configuration

The internal reference can be disabled by connecting REFLO to

AVDD. In this case, an external reference may then be applied

to REFIO as shown in Figure 14. The external reference may

provide either a fixed reference voltage to enhance accuracy and

drift performance or a varying reference voltage for gain control.

Note that the 0.1

µF compensation capacitor is not required

since the internal reference is disabled, and the high input

impedance (i.e., 1 M

Ω) of REFIO minimizes any loading of the

external reference.

50pF

COMP1

+1.2V REF

AVDD

REFLO

CURRENT

SOURCE

ARRAY

0.1 F

AVDD

REFIO

FS ADJ

AD9708

EXTERNAL

REF

AVDD

REFERENCE

CONTROL

AMPLIFIER

Figure 14. External Reference Configuration

The AD9708 also contains an internal control amplifier that is

The control amplifier is configured as a V-I converter, as shown

in Equation 4. The control amplifier allows a wide (10:1)

µA and 625 µA. The wide adjustment span of

relates directly to the power dissipation of the AD9708, which is

section). The second benefit relates to the 20 dB adjustment,

which is useful for system gain control purposes.

The small signal bandwidth of the reference control amplifier is

approximately 1.8 MHz and can be reduced by connecting an

external capacitor between COMP1 and AVDD. The output of

the control amplifier, COMP1, is internally compensated via a

50 pF capacitor that limits the control amplifier small-signal

bandwidth and reduces its output impedance. Any additional

external capacitance further limits the bandwidth and acts as

a filter to reduce the noise contribution from the reference

µF ceramic chip

capacitor is recommended.

reference and varying the common-mode voltage over its

compliance range of 1.25 V to 0.10 V. REFIO can be driven by

approximately 1 M

Ω, a simple R-2R ladder DAC configured in

the voltage mode topology may be used to control the gain. This

circuit is shown in Figure 15 using the AD7524 and an external

1.2 V reference, the AD1580. Note another AD9708 could also

be used as the gain control DAC since it can also provide a

programmable unipolar output up to 1.2 V.

ANALOG OUTPUTS AND OUTPUT CONFIGURATIONS

The AD9708 produces two complementary current outputs,

section. Figure 16 shows the AD9708 configured to provide a

positive unipolar output range of approximately 0 V to +0.5 V

for a double terminated 50

Ω cable for a nominal full-scale

equivalent load resistance seen by IOUTA or IOUTB and is

equal to 25

Ω. The unused output (IOUTA or IOUTB) can be

tive compliance range is adhered to.

AD9708

IOUTA

50

25

50

22

Figure 16. 0 V to +0.5 V Unbuffered Voltage Output

Alternatively, an amplifier could be configured as an I-V converter

thus converting IOUTA or IOUTB into a negative unipolar

1.2V

50pF

COMP1

+1.2V REF

AVDD

REFLO

CURRENT

SOURCE

ARRAY

AVDD

REFIO

FS ADJ

AD9708

AVDD

OPTIONAL

BANDLIMITING

CAPACITOR

OUT1

OUT2

AGND

DB7–DB0

AD7524

AD1580

0.1V TO 1.2V

Figure 15. Single-Supply Gain Control Circuit