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CS52843EDR14 Arkusz danych(PDF) 4 Page - Cherry Semiconductor Corporation |
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CS52843EDR14 Arkusz danych(HTML) 4 Page - Cherry Semiconductor Corporation |
4 / 6 page Figure 1: Startup voltage for the CS52843. Undervoltage Lockout During Undervoltage Lockout (Figure 1), the output driv- er is biased to sink minor amounts of current. The output should be shunted to ground with a resistor to prevent activating the power switch with extraneous leakage cur- rents. PWM Waveform To generate the PWM waveform, the control voltage from the error amplifier is compared to a current sense signal which represents the peak output inductor current (Figure 2). An increase in VCC causes the inductor current slope to increase, thus reducing the duty cycle. This is an inherent feed-forward characteristic of current mode control, since the control voltage does not have to change during changes of input supply voltage. VCC VON =8.4V VOFF = 7.6V ON/OFF Command to reset of IC <15mA <500µA VON VOFF ICC VCC 4 Test Circuit Open Loop Laboratory Test Fixture VREF VCC VOUT 1kΩ 1W 0.1µF 0.1µF VREF VCC VOUT Gnd VFB Sense OSC COMP 5kΩ 100kΩ 4.7kΩ 1kΩ Error Amp Adjust 4.7kΩ Sense Adjust RT 2N2222 CT Gnd A Typical Performance Characteristics 100 200 700 1k 2k 5k 7k 10k 80 90 RT (Ω) 70 60 50 40 30 20 10 4k 3k 500 400 300 100 .0005 .001 .002 .003 .005 .01 .02 .03 .04 800 900 CT (µF) 700 600 500 400 300 200 100 .05 RT =1.5kΩ RT =680Ω RT =10kΩ Oscillator Frequency vs CT Oscillator Duty Cycle vs RT Circuit Description |
Podobny numer części - CS52843EDR14 |
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Podobny opis - CS52843EDR14 |
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