Zakładka z wyszukiwarką danych komponentów
  Polish  ▼

Delete All
ON OFF
ALLDATASHEET.PL

X  

Preview PDF Download HTML

CS4391 Arkusz danych(PDF) 2 Page - Cirrus Logic

Numer części CS4391
Szczegółowy opis  24-Bit, 192 kHz Stereo DAC with Volume Control 
Download  40 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  CIRRUS [Cirrus Logic]
Strona internetowa  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4391 Arkusz danych(HTML) 2 Page - Cirrus Logic

  CS4391 Datasheet HTML 1Page - Cirrus Logic CS4391 Datasheet HTML 2Page - Cirrus Logic CS4391 Datasheet HTML 3Page - Cirrus Logic CS4391 Datasheet HTML 4Page - Cirrus Logic CS4391 Datasheet HTML 5Page - Cirrus Logic CS4391 Datasheet HTML 6Page - Cirrus Logic CS4391 Datasheet HTML 7Page - Cirrus Logic CS4391 Datasheet HTML 8Page - Cirrus Logic CS4391 Datasheet HTML 9Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 2 / 40 page
background image
CS4391
2
DS335PP3
TABLE OF CONTENTS
1. CHARACTERISTICS/SPECIFICATIONS .......................................................................... 5
ANALOG CHARACTERISTICS...................................................................................... 5
DIGITAL CHARACTERISTICS....................................................................................... 7
ABSOLUTE MAXIMUM RATINGS ................................................................................. 7
RECOMMENDED OPERATING CONDITIONS............................................................. 7
SWITCHING CHARACTERISTICS - PCM MODES....................................................... 8
SWITCHING CHARACTERISTICS - DSD ..................................................................... 9
SWITCHING CHARACTERISTICS - I2C CONTROL PORT ........................................ 10
SWITCHING CHARACTERISTICS - SPI CONTROL PORT ....................................... 11
2. TYPICAL CONNECTION DIAGRAMS ............................................................................ 12
3. REGISTER QUICK REFERENCE ................................................................................... 14
3.1 Mode Control 1 (address 01h)................................................................................ 14
3.2 Volume and Mixing Control (address 02h) ............................................................. 15
3.3 Channel A Volume Control (address 03h).............................................................. 15
3.4 Channel B Volume Control (address 04h).............................................................. 15
3.5 Mode Control 2 (address 05h)................................................................................ 16
4. REGISTER DESCRIPTION ............................................................................................. 17
4.1 Mode Control 1 - Address 01h................................................................................ 17
4.1.1 Auto-Mute (Bit 7) .............................................................................17
4.1.2 Digital Interface Formats (Bits 6:4) ..................................................17
4.1.3 De-Emphasis Control (Bits 3:2) .......................................................17
4.1.4 Functional Mode (Bits 1:0) ..............................................................17
4.2 Volume and Mixing Control (Address 02h)............................................................. 18
4.2.1 Channel A Volume = Channel B Volume (Bit 7) ..............................18
4.2.2 Soft Ramp or Zero Cross Enable (Bits 6:5) .....................................18
4.2.3 ATAPI Channel Mixing and Muting (Bits 4:0) ..................................18
4.3 Channel A Volume Control - Address 03h.............................................................. 18
4.4 Channel B Volume Control - Address 04h.............................................................. 19
4.4.1 Mute (Bit 7) ......................................................................................19
4.4.2 Volume Control (Bits 6:0) ................................................................19
4.5 Mode Control 2 - Address 05h................................................................................ 19
4.5.1 Invert Signal Polarity (Bits 7:6) ........................................................19
4.5.2 Control Port Enable (Bit 5) ..............................................................19
4.5.3 Power Down (Bit 4) .........................................................................19
4.5.4 AMUTEC = BMUTEC (Bit 3) ...........................................................19
4.5.5 Freeze (Bit 2) ..................................................................................20
4.5.6 Master Clock Divide (Bit 1) ..............................................................20
5. PIN DESCRIPTION - PCM DATA MODE ........................................................................ 21
Reset - RST.................................................................................................................. 21
Interface Power - VL..................................................................................................... 21
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/
I2C is a registered trademark of Philips Semiconductors.
Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product infor-
mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of
any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights
of third parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of
this publication may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or
otherwise) without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no
part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical,
photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication maybe used as a basis for manufacture
or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing
in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade-
marks and service marks can be found at http://www.cirrus.com.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40 


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn