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ADC14L040 Arkusz danych(PDF) 11 Page - Texas Instruments

Numer części ADC14L040
Szczegółowy opis  14-Bit, 40 MSPS, 235 mW A/D Converter
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Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
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ADC14L040 Arkusz danych(HTML) 11 Page - Texas Instruments

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VA
AGND
To Internal Circuitry
I/O
ADC14L040
www.ti.com
SNAS311A – JUNE 2005 – REVISED APRIL 2006
AC Electrical Characteristics
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.3V, VDR =
+2.5V, PD = 0V, External VREF = +1.0V, fCLK = 40 MHz, fIN = 10 MHz, tr = tf = 2 ns, CL = 15 pF/pin, Duty Cycle Stabilizer On.
Boldface limits apply for TJ = TMIN to TMAX: all other limits TJ = 25°C
(1) (2) (3) (4)
Typical
Limits
Units
Symbol
Parameter
Conditions
(5)
(5)
(Limits)
fCLK1
Maximum Clock Frequency
40
MHz (min)
fCLK2
Minimum Clock Frequency
5
MHz
tCH
Clock High Time
Duty Cycle Stabilizer On
12.5
5
ns (min)
tCL
Clock Low Time
Duty Cycle Stabilizer On
12.5
5
ns (min)
tCH
Clock High Time
Duty Cycle Stabilizer Off
12.5
10
ns (min)
tCL
Clock Low Time
Duty Cycle Stabilizer Off
12.5
10
ns (min)
tCONV
Conversion Latency
7
Clock Cycles
Data Output Delay after Rising Clock
tOD
6
9.6
ns (max)
Edge
tAD
Aperture Delay
2
ns
tAJ
Aperture Jitter
0.7
ps rms
0.1 µF on pins 30, 31, 32; 10 µF between
tPD
Power Down Mode Exit Cycle
280
µs
pins 30, 31
(1)
The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided
current is limited per Characteristics Note. However, errors in the A/D conversion can occur if the input goes above VA or below GND by
more than 100 mV. As an example, if VA is +3.3V, the full-scale input voltage must be ≤+3.4V to ensure accurate conversions.
(2)
To guarantee accuracy, it is required that |VA–VD| ≤ 100 mV and separate bypass capacitors are used at each power supply pin.
(3)
With the test condition for VREF = +1.0V (2VP-P differential input), the 14-bit LSB is 122.1 µV.
(4)
Timing specifications are tested at TTL logic levels, VIL = 0.4V for a falling edge and VIH = 2.4V for a rising edge.
(5)
Typical figures are at TJ = 25°C, and represent most likely parametric norms. Test limits are guaranteed to National's AOQL (Average
Outgoing Quality Level).
Characteristics Note
When the input voltage at any pin exceeds the power supplies (that is, VIN < AGND, or VIN > VA), the current at
that pin should be limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins
that can safely exceed the power supplies with an input current of 25 mA to two.
Specification Definitions
APERTURE DELAY is the time after the rising edge of the clock to when the input signal is acquired or held for
conversion.
APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample.
Aperture jitter manifests itself as noise in the output.
Copyright © 2005–2006, Texas Instruments Incorporated
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