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ADS1232 Arkusz danych(PDF) 3 Page - Texas Instruments |
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ADS1232 Arkusz danych(HTML) 3 Page - Texas Instruments |
3 / 40 page www.ti.com ELECTRICAL CHARACTERISTICS ADS1232 ADS1234 SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 All specifications at TA = –40°C to +105°C, AVDD = DVDD = VREFP = +5V, and VREFN = AGND, unless otherwise noted. ADS1232, ADS1234 PARAMETER CONDITIONS MIN TYP MAX UNIT Analog Inputs Full-Scale Input Voltage ±0.5VREF/Gain V (AINP – AINN) AINxP or AINxN with respect to GND, AGND – 0.1 AVDD + 0.1 V Gain = 1, 2 Common-Mode Input Range Gain = 64, 128 AGND + 1.5V AVDD – 1.5V V Gain = 1 ±3 nA Differential Input Current Gain = 2 ±6 nA Gain = 64, 128 ±3.5 nA System Performance Resolution No Missing Codes 24 Bits Internal Oscillator, SPEED = High 78 80 82.4 SPS Internal Oscillator, SPEED = Low 9.75 10 10.3 SPS Data Rate External Oscillator, SPEED = High fCLK/61,440 SPS External Oscillator, SPEED = Low fCLK/491,520 SPS Digital Filter Settling Time Full Settling 4 Conversions Differential Input, End-Point Fit ±0.0002 ±0.001 % of FSR(1) Gain = 1, 2 Integral Nonlinearity (INL) Differential Input, End-Point Fit ±0.0004 % of FSR Gain = 64, 128 Gain = 1 ±0.2 ±5 ppm of FS Input Offset Error(2) Gain = 128 ±0.02 ±1 ppm of FS Gain = 1 ±0.3 µV/ °C Input Offset Drift Gain = 128 ±10 nV/ °C Gain = 1 ±0.001 ±0.02 % Gain Error(3) Gain = 128 ±0.01 ±0.1 % Gain = 1 ±0.2 ppm/ °C Gain Drift Gain = 128 ±2.5 ppm/ °C Internal Oscillator, fDATA = 10SPS 100 110 dB fIN = 50Hz or 60Hz, ±1Hz Normal-Mode Rejection(4) External Oscillator, fDATA = 10SPS 120 130 dB fIN = 50Hz or 60Hz, ±1Hz at DC, Gain = 1, ΔV = 1V 95 110 dB Common-Mode Rejection at DC, Gain = 128, ΔV = 0.1V 95 110 dB Input-Referred Noise See Noise Performance Tables at DC, Gain = 1, ΔV = 1V 100 120 dB Power-Supply Rejection at DC, Gain = 128, ΔV = 0.1V 100 120 dB Voltage Reference Input Voltage Reference Input (VREF) VREF = VREFP – VREFN 1.5 AVDD AVDD + 0.1V V Negative Reference Input (VREFN) AGND – 0.1 VREFP – 1.5 V Positive Reference Input (VREFP) VREFN + 1.5 AVDD + 0.1 V Voltage Reference 10 nA Input Current (1) FSR = full-scale range = VREF/Gain. (2) Offset calibration can minimize these errors to the level of noise at any temperature. (3) Gain errors are calibrated at the factory (AVDD = +5V, all gains, TA = +25°C). (4) Specification is assured by the combination of design and final production test. Copyright © 2005–2008, Texas Instruments Incorporated 3 Product Folder Link(s): ADS1232 ADS1234 |
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